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| QUAD DRIVER SY10E112 SY100E112 FEATURES s s s s 600ps max. propagation delay Extended 100E VEE range of -4.2V to -5.5V Common enable input Fully compatible with industry standard 10KH, 100K I/O levels s Internal 75K input pulldown resistors s Fully compatible with Motorola MC10E/100E112 s Available in 28-pin PLCC package DESCRIPTION The SY10/100E112 are quad drivers designed for use in new, high-performance ECL systems. The E112 has two pairs of OR/NOR outputs from each gate and a common, buffered enable input. The data input can also be used as an ECL memory address fan-out driver, although the E111 is designed specifically for this purpose, and offers lower skew than the E112. For memory address driver applications where scan capabilities are required, please refer to the SY10/100E212 device. BLOCK DIAGRAM Q0a Q0b Q0a Q0b PIN CONFIGURATION VCCO Q2b Q2a Q3b VCCO D0 25 24 23 22 21 20 19 26 27 28 1 2 3 4 5 6 7 8 9 10 11 18 17 Q3a Q3b Q3a Q2b Q2a VCC Q1b Q1a Q1b Q1a Q1a D1 Q1b Q1a Q1b Q2a D2 Q2b Q2a Q2b Q3a D3 Q3b Q3a Q3b D3 D2 VEE D1 D0 EN PLCC TOP VIEW J28-1 16 15 14 13 12 NC VCCO Q0a PIN NAMES Pin Function Data Inputs Enable Input True Outputs Inverting Outputs VCC to Output EN D0-D3 EN Qna, Qnb Qna, Qnb VCCO Q0b VCCO Rev.: D Q0a Q0b Amendment: /2 1 Issue Date: May, 1998 Micrel SY10E112 SY100E112 TRUTH TABLE EN L H Qn Dn H Qn Dn L DC ELECTRICAL CHARACTERISTICS VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND TA = -40C Symbol IIH Parameter Input HIGH Current EN D Power Supply Current 10E 100E -- -- 47 47 56 56 -- -- 47 47 56 56 -- -- 47 47 56 56 -- -- 47 54 56 65 TA = 0C TA = +25C Max. Min. Typ. 150 200 -- -- -- -- TA = +85C Max. 150 200 mA Unit A -- -- -- -- 150 200 -- -- -- -- 150 200 -- -- -- -- Min. Typ. Max. Min. Typ. Max. Min. Typ. IEE AC ELECTRICAL CHARACTERISTICS VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND TA = -40C Symbol tPLH tPHL tskew Parameter Min. TA = 0C TA = +25C Max. Min. Typ. 600 675 -- -- 700 200 275 -- -- 275 400 450 80 40 425 TA = +85C Typ. Max. 400 450 80 40 425 600 675 ps -- -- 275 80 40 425 -- -- 700 -- -- 275 80 40 425 -- -- 700 -- -- 275 -- -- 700 ps Unit ps 400 450 600 675 200 275 400 450 600 675 200 275 Typ. Max. Min. Typ. Max. Min. Propagation Delay to Output D 200 EN 275 Within-Device Skew Dn to Qn, Qn(1) Qna to Qnb(2) Rise/Fall Time 20% to 80% tr tf NOTES: 1. Within-device skew is defined as identical transitions on similar paths through a device. 2. Skew defined between common OR or common NOR outputs of a single gate. PRODUCT ORDERING CODE Ordering Code SY10E112JC SY10E112JCTR SY100E112JC SY100E112JCTR Package Type J28-1 J28-1 J28-1 J28-1 Operating Range Commercial Commercial Commercial Commercial Ordering Code SY10E112JI SY10E112JITR SY100E112JI SY100E112JITR Package Type J28-1 J28-1 J28-1 J28-1 Operating Range Industrial Industrial Industrial Industrial 2 Micrel SY10E112 SY100E112 28 LEAD PLCC (J28-1) Rev. 03 3 Micrel SY10E112 SY100E112 MICREL-SYNERGY TEL 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA FAX + 1 (408) 980-9191 + 1 (408) 914-7878 WEB http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. (c) 2000 Micrel Incorporated 4 |
Price & Availability of SY10E112
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