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FST3253 Dual 4:1 Multiplexer/Demultiplexer Bus Switch
September 1997 Revised December 1999
FST3253 Dual 4:1 Multiplexer/Demultiplexer Bus Switch
General Description
The Fairchild Switch FST3253 is a dual 4:1 high-speed CMOS TTL-compatible multiplexer/demultiplexer bus switch. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. When OE is LOW, S0 and S1 connect the A Port to the selected B Port output. When OE is HIGH, the switch is OPEN and a high-impedance state exists between the two ports.
Features
s 4 switch connection between two ports. s Minimal propagation delay through the switch. s Low lCC. s Zero bounce in flow-through mode. s Control inputs compatible with TTL level.
Ordering Code:
Order Number FST3253M FST3253QSC FST3253MTC Package Number M16A MQA16 MTC16 Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Logic Diagram
Connection Diagram
Truth Table Pin Descriptions
Pin Name OE1, OE2 S0 , S1 A B1 , B2 , B3 , B4 Description Bus Switch Enables Select Inputs Bus A Bus B S1 X X L L H H S0 X X L H L H OE1 H X L L L L OE2 X H L L L L Function Disconnect 1A Disconnect 2A A = B1 A = B2 A = B3 A = B4
(c) 1999 Fairchild Semiconductor Corporation
DS500058
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FST3253
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC ) DC Switch Voltage (VS) DC Input Voltage (VIN)(Note 2) DC Input Diode Current (lIK) VIN<0V DC Output (IOUT ) Sink Current DC VCC/GND Current (ICC/IGND) Storage Temperature Range (TSTG) -0.5V to +7.0V -0.5V to +7.0V -0.5V to +7.0V -50mA 128mA +/- 100mA -65C to +150 C
Recommended Operating Conditions (Note 3)
Power Supply Operating (VCC) Input Voltage (VIN) Output Voltage (VOUT) Input Rise and Fall Time (tr, tf) Switch Control Input Switch I/O Free Air Operating Temperature (TA) 0ns/V to 5ns/V 0ns/V to DC -40 C to -85 C 4.0V to 5.5V 0V to 5.5V 0V to 5.5V
Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The Recommended Operating Conditions tables will define the conditions for actual device operation. Note 2: The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Note 3: Unused control inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol VIK VIH VIL II IOZ RON Parameter Clamp Diode Voltage High Level Input Voltage Low Level Input Voltage Input Leakage Current OFF-STATE Leakage Current Switch On Resistance (Note 5) VCC (V) 4.5 4.0-5.5 4.0-5.5 5.5 5.5 4.5 4.5 4.5 4.0 ICC ICC Quiescent Supply Current Increase in ICC per Input 5.5 5.5 4 4 8 11 2.0 0.8 1.0 1.0 7 7 15 20 3 2.5 TA = -40 C to +85 C Min Typ (Note 4) Units Max -1.2 V V V A A A mA 0 VIN 5.5V 0 A, B VCC VIN = 0V, IIN = 64mA VIN = 0V, IIN = 30mA VIN = 2.4V, IIN = 15mA VIN = 2.4V, IIN = 15mA VIN = VCC or GND, IOUT = 0 One input at 3.4V Other inputs at VCC or GND
Note 4: Typical values are at VCC = 5.0V and T A = +25C Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the voltages on the two (A or B) pins.
Conditions IIN = -18mA
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FST3253
AC Electrical Characteristics
TA = -40 C to +85 C CL = 50pF, RU = RD = 500 Symbol Parameter VCC = 4.5 - 5.5V Min tPHL,tPLH tPZH, tPZL tPHZ, tPLZ Prop Delay Bus to Bus (Note 6) Prop Delay, Select to Bus A Output Enable Time, Select to Bus B Output Enable Time, IOE to Bus A, B Output Disable Time., Select to Bus B Output Disable Time, IOE to Bus A, B 1.0 1.0 1.0 1.0 1.0 Max 0.25 5.3 5.3 5.3 5.8 5.5 VCC = 4.0V Min Max 0.25 6.3 6.0 6.2 6.2 6.2 ns ns ns VI = OPEN VI = 7V for tPZL VI = OPEN for tPZH VI = 7V for tPLZ VI = OPEN for tPHZ Figure 1 Figure 2 Figure 1 Figure 2 Figure 1 Figure 2 Units Conditions Figure No.
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Capacitance
Symbol CIN CI/O A Port B Port
(Note 7)
Parameter Typ 3 13 5 Max Units pF pF pF Conditions VCC = 5.0V VCC, OE = 5.0V
Control Pin Input Capacitance Input/Output Capacitance
Note 7: TA = +25C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 source terminated in 50 Note: C L includes load and stray capacitance Note: Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
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FST3253
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide Package Number MQA16
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FST3253 Dual 4:1 Multiplexer/Demultiplexer Bus Switch
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16
Technology Description
The Fairchild Switch family derives from and embodies Fairchild's proven switch technology used for several years in its 74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 5 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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