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| STA7360 20W BRIDGE/STEREO AUDIO AMPLIFIER WITH CLIPPING DETECTOR s s s s s s s s s s VERY FEW EXTERNAL COMPONENTS NO BOUCHEROT CELLS NO BOOSTRAP CAPACITORS HIGH OUTPUT POWER NO SWITCH ON/OFF NOISE VERY LOW STAND-BY CURRENT FIXED GAIN (20dB STEREO) PROGRAMMABLE TURN-ON DELAY CLIPPING DETECTOR ST-BY FUNCTION MULTIWATT11V ORDERING NUMBER: STA7360 Protections: s OUTPUT AC-DC SHORT CIRCUIT TO GROUND AND TO SUPPLY VOLTAGE s VERY INDUCTIVE LOADS s LOUDSPEAKER PROTECTION s OVERRATING CHIP TEMPERATURE s ESD PROTECTION DESCRIPTION The STA7360 is a new technology class AB Audio APPLICATION CIRCUIT Power Amplifier in the Multiwatt(R) package.Thanks to the fully complementary PNP/NPN output configuration the high power performance of the STA7360 is obtained without bootstrap capacitors. A delayed turn-on mute circuit eliminates audible on/ off noise, and a novel short circuit protection system prevents spurious intervention with highly inductive loads. The device provides a circuit for the detection of clipping in the output stages. The output, an open collector is able to drive systems with automatic volume control. 20K +VS C4 1F 22F C3 SVR 0.22F C2 IN2(+) 0.22F C1 IN IN1(+) 1 2 3 S-GND 6 P-GND D00AU1213 220F C5 STAND-BY 11 7 100nF C6 9 8 OUT2 RL 5 10 4 OUT1 OUT BRIDGE CLIP DET September 2003 1/18 STA7360 PIN CONNECTION (Top view) 11 10 9 8 7 6 5 4 3 2 1 STAND-BY OUT1 +VS OUT2 SVR P-GND IN2(+) OUT BRIDGE S-GND CLIP DET IN1(+) TAB CONNECTED TO PIN 6 D98AU938A ABSOLUTE MAXIMUM RATINGS Symbol VS Io Io Ptot Tstg,TJ Operating Supply Voltage Output Peak Current (non rep. for t = 100s) Output Peak Current (rep. freq. > 10Hz) Power Dissipation at Tcase = 85C Storage and Junction Temperature Parameter Value 20 5 4 36 -40 to 150 Unit V A A W C THERMAL DATA Symbol Rth j-case Parameter Thermal Resistance Junction-case Max Value 1.8 Unit C/W 2/18 STA7360 ELECTRICAL CHARACTERISTCS (Refer to the test circuits, Tamb = 25C, VS = 14.4V, f = 1KHz unless otherwise specified) Symbol VS Id ASB ISB ICO STEREO PO Output Power (each channel) THD = 10% RL = 2 RL = 3.2 RL = 4,12V RL = 4 Po = 0.1 to 2.5W; RL = 4 Po = 0.1 to 4W; RL = 3.2 Rg = 10K C3 = 22F f = 100Hz C3 = 100F f = 1KHz f = 10KHz 45 62 45 55 50 19 20 21 1 22 Hz to 22KHz Rg = 50 Rg = 10K Rg = 2.5 3 3.5 5 7 7 11 8 4.5 6.5 0.05 0.05 0.5 0.5 W W W W % % dB dB dB dB K dB dB V V V Parameter Supply Voltage Range Total Quiescent Drain Current Stand-by attenuation Stand-by Current Clip Detector Prog. Current pin 2 pull up to 5V d = 1% with 10KW d = 5% 70 130 stereo configuration 60 Test Condition Min. 8 65 80 100 Typ. Max. 18 120 Unit V mA dB A A A d Distortion SVR CT RI GV GV EIN Supply Voltage Rejection Crosstalk Input Resistance Voltage Gain Voltage Gain Match Input Noise Voltage BRIDGE Vos Po d SVR RI GV EIN Output Offset Voltage Output Power THD = 10% RL = 4,12V RL = 4; 14.4V Po = 0.1 to 7W; RL = 4 Rg = 10K; C3 = 22F f = 100Hz; C3 = 100F 45 62 50 26 22Hz to 22KHz Rg = 50 Rg = 10K 3.5 4 16 15 20 0.05 0.5 250 mV W W % dB dB K dB V V Distortion Supply Voltage Rejection Input Resistance Voltage Gain Input Noise Voltage 3/18 STA7360 Figure 1. STEREO Test and Application Circuit 20K +VS C4 1F 100F C3 11 SVR 0.22F C2 IN2(+) 0.22F C1 IN IN1(+) 1 2 3 S-GND 6 P-GND D00AU1214 220F C5 STAND-BY 100nF C6 9 8 4 7 OUT2 1000F C7 5 OUT BRIDGE 1000F C8 RL 10 OUT1 RL CLIP DET Figure 2. P.C. Board and Component Layout (STEREO) of the circuit of fig. 1 (1:1 scale) 4/18 STA7360 Figure 3. BRIDGE Test and Appication Circuit 20K +VS C4 1F 22F C3 SVR 0.22F C2 IN2(+) 0.22F C1 IN IN1(+) 1 2 3 S-GND 6 P-GND D00AU1213 220F C5 STAND-BY 11 7 100nF C6 9 8 OUT2 RL 5 10 4 OUT1 OUT BRIDGE CLIP DET Figure 4. Board and Layout (BRIDGE) of the circuit of fig. 3 (1:1 scale) 5/18 STA7360 Figure 5. Output Power vs. Supply Voltage (Stereo) Figure 8. Output Power vs. Supply Voltage (Bridge) Figure 6. Output Power vs. Supply Voltage (Stereo) Figure 9. Drain Current vs Supply Voltage (Stereo) Figure 7. Output Power vs. Supply Voltage (Stereo) Figure 10. Distortion vs Output Power (Stereo) 6/18 STA7360 Figure 11. Distortion vs Output Power (Stereo) Figure 14. SVR vs. Frequency & C3 (Stereo) Figure 12. Distortion vs Output Power (Stereo) Figure 15. SVR vs. Frequency & C3 (Bridge) Figure 13. Distortion vs Output Power (Bridge) Figure 16. Crosstalk vs. Frequency (Stereo) 7/18 STA7360 Figure 17. Power Dissipation& Efficiency vs. Output Power(Stereo) BLOCK DESCRIPTION PolarizationThe device is organized with the gain resistors directly connected to the signal ground pin i.e. without gain capacitors (fig. 20). The non inverting inputs of the amplifiers are connected to the SVR pin by means of resistor dividers, equal to the feedback networks. This allows the outputs to track the SVR pin which is sufficiently slow to avoid audible turn-on and turn-off transients. SVR The voltage ripple on the outputs is equal to the one on SVR pin: with appropriate selection of CSVR, more than 60dB of ripple rejection can be obtained. Delayed Turn-on (muting) The CSVR sets a signal turn-on delay too. A circuit is included which mutes the device until the voltage on SVR pin reaches ~2.5V typ. (fig. 22). The mute function is obtained by duplicating the input differential pair (fig. 21): it can be switched to the signal source or to an internal mute input. This feature is necessary to prevent transients at the inputs reaching the loudspeaker(s) immediately after power-on). Fig. 22 represents the detailed turn-on transient with reference to the stereo configuration.At the power-on the output decoupling capacitors are charged through an internal path but the device itself remains switched off (phase 1 of the represented diagram). When the outputs reach the voltage level of about 1V (this means that there is no presence of short circuits) the device switches on, the SVR capacitor starts charging itself and the output tracks exactly the SVR pin.During this phase the device is muted until the SVR reaches the "Play" threshold (~2.5V typ.), after that the music signal starts being played. Stereo/Bridge Switching There is also no need for external components for changing from stereo to bridge configuration (figg. 20, 22). A simple short circuit between two pins allows phase reversal at one output, yet maintaining the quiescent output voltage. Stand-by The device is also equipped with a stand-by function, so that a low current, and hence low cost switch, can be used for turn on/off. Stability The device is provided with an internal compensation wich allows to reach low values of closed loop gain.In this way better performances on S/N ratio and SVR can be obtained. Figure 18. Power Dissipation& Efficiency vs. Output Power (Stereo) Figure 19. Power Dissipation& Efficiency vs. Output Power (Bridge) 8/18 STA7360 RECOMMENDED VALUES OF THE EXTERNAL COMPONENTS (ref to the Stereo Test and Application Circuit) Comp. C1 Recommended Value Purpose Input Decoupling (CH1) Input Decoupling (CH2) Supply Voltage Rejection Filtering Capacitor Stand-By ON/OFF Delay Supply By-Pass Supply By-Pass Output Decoupling CH2 Output Decoupling CH1 Larger than the Recomm. Value - Smaller than the Recomm. Value - 0.22F C2 0.22F - - C3 100F Longer Turn-On Delay Time - Worse Supply Voltage Rejection. - Shorter Turn-On Delay Time - Danger of Noise (POP C4 1F Delayed Turn-Off by Stand- Danger of Noise (POP) By Switch Danger of Oscillations Danger of Oscillations - Decrease of Low Frequency Cut Off - Longer Turn On Delay - Decrease of Low Frequency Cut Off - Longer Turn On Delay - Increase of Low Frequency Cut Off - Shorter Turn On Delay - Increase of Low Frequency Cut Off - Shorter Turn On Delay C5 C6 C7 220F (min) 100nF (min) 2200F C8 2200F Figure 20. Block Diagram; Stereo Configuration INPUT 1 20K ST-BY 1F VCC + SVR CLIPPING DETECTOR CLIP DETECT OUT BRIDGE OUT1 L GND INPUT 2 + PWGND D00AU1215 - OUT2 R 9/18 STA7360 Figure 21. Mute Function Diagram Figure 22. Turn-on Delay Circuit 10/18 STA7360 Figure 23. Block Diagram; Bridge Configuration INPUT 1 20K ST-BY 1F VCC + SVR CLIPPING DETECTOR CLIP DETECT OUT1 OUT BRIDGE GND INPUT 2 OUT2 Figure 24. Dual Channel Distortion Detector IN1 CLIP DET DISTORTION DETECTOR IN2 + PWGND D00AU1216 OUT1 OUT2 D98AU959 11/18 STA7360 Figure 25. ICV - PNP Gain vs. IC OUTPUT STAGE Poor current capability and low cutoff frequency are well known limits of the standard lateral PNP. Composite PNP-NPN power output stages have been widely used, regardless their high saturation drop. This drop can be overcome only at the expense of external components, namely, the bootstrap capacitors. The availability of 4A isolated collector PNP (ICV PNP) adds versatility to the design. The performance of this component, in terms of gain, VCEsat and cutoff frequency, is shown in fig. 25, 26, 27 respectively. It is realized in a new bipolar technology, characterized by top-bottom isolation techniques, allowing the implementation of low leakage diodes, too. It guarantees BVCEO >20V and BVCBO >50V both for NPN and PNP transistors. Basically, the connection shown in fig. 13 has been chosen. First of all because its voltage swing is rail-to-rail, limited only by the VCEsat of the output transistors, which are in the range of 0.3W each. Then, the gain VOUT/VIN is greater than unity, approximately 1+R2/R1. (VCC/2 is fixed by an auxiliary amplifier common to both channel). It is possible, controlling the amount of this local feedback, to force the loop gain (A * b) to less than unity at frequencies for which the phase shift is 180. This means that the output buffer is intrinsically stable and not prone to oscillation. Figure 28. The New Output Stage Figure 26. ICV - PNP VCE(sat) vs. IC Figure 27. ICV - PNP cut-off frequency vs. IC In contrast, with the circuit of fig. 29, the solution adopted to reduce the gain at high frequencies is the use of an external RC network. AMPLIFIER BLOCK DIAGRAM The block diagram of each voltage amplifier is shown in fig. 30. Regardless of production spread, the current in each final stage is kept low, with enough margin on the minimum, below which cross-over distortion would appear. 12/18 STA7360 Figure 29. A Classical Output Stage Figure 30. Amplifier Block Diagram BUILT-IN PROTECTION SYSTEMS Short Circuit ProtectionThe maximum current the device can deliver can be calculated by considering the voltage that may be present at the terminals of a car radio amplifier and the minimum load impedance. Apart from consideration concerning the area of the power transistors it is not difficult to achieve peak currents of this magnitude (5A peak).However, it becomes more complicated if AC and DC short circuit protection is also required.In particular, with a protection circuit which limits the output current following the SOA curve of the output transistors it is possible that in some conditions (highly reactive loads, for example) the protection circuit may intervene during normal operation. For this reason each amplifier has been equipped with a protection circuit that intervenes when the output current exceeds 4A Fig 16 shows the protection circuit for an NPN power transistor (a symmetrical circuit applies to PNP). The VBE of the power is monitored and gives out a signal,available through a cascode. This cascode is used to avoid the intervention of the short circuit protection when the saturation is below a given limit. The signal sets a flip-flop which forces the amplifier outputs into a high impedance state. In case of DC short circuit when the short circuit is removed the flip-flop is reset and restarts the circuit (fig. 36). In case of AC short circuit or load shorted in Bridge configuration, the device is continuously switched in ON/OFF conditions and the current is limited. Figure 31. Circuitry for Short Circuit Detection 13/18 STA7360 Polarity Inversion High current (up to 10A) can be handled by the device with no damage for a longer period than the blow-out time of a quick 2A fuse (normally connected in series with the supply). This features is added to avoid destruction, if during fitting to the car, a mistake on the connection of the supply is made. DC Voltage The maximum operating DC voltage for the STA7360 is 18V. Thermal Shut-down The presence of a thermal limiting circuit offers the following advantages: 1) an overload on the output (even if it is permanent), or an excessive ambient temperature can be easily withstood. )the heatsink can have a smaller factor of safety compared with that of a conventional circuit. There is no device damage in the case of excessive junction temperature: all happens is that Po (and therefore Ptot) and Id are reduced. APPLICATION HINTS This section explains briefly how to get the best from the STA7360 and presents some application circuits with suggestions for the value of the components. These values can change depending on the characteristics that the designer of the car radio wants to obtain,or other parts of the car radio that are connected to the audio block. To optimize the performance of the audio part it is useful (or indispensable) to analyze also the parts outside this block that can have an interconnection with the amplifier. This method can provide components and system cost saving. Reducing Turn On-Off Pop The STA7360 has been designed in a way that the turn on(off) transients are controlled through the charge(discharge) of the Csvr capacitor. As a result of it, the turn on(off) transient spectrum contents is limited only to the subsonic range. The following section gives some brief notes to get the best from this design feature(it will refer mainly to the stereo application which appears to be in most cases the more critical from the pop viewpoint. The bridge connection in fact,due to the common mode waveform at the outputs, does not give pop effect). TURN-ON Fig 34 shows the output waveform (before and after the "A" weighting filter) compared to the value of Csvr. Better pop-on performance is obtained with higher Csvr values (the recommended range is from 22uF to 220uF). Loudspeaker Protection The STA7360 guarantees safe operations even for the loudspeaker in case of accidental shortcircuit.Whenever a single OUT to GND, OUT to VS 14/18 short circuit occurs both the outputs are switched OFF so limiting dangerous DC current flowing through the loudspeaker. Figure 33. Restart Circuit 2 The maximum allowable power dissipation depends upon the size of the external heatsink (i.e. its thermal resistance); Fig. 32 shows the dissipable power as a function of ambient temperature for different thermal resistance. Figure 32. Maximum Allowable Power Dissipation vs. Ambient Temperature The turn-on delay (during which the amplifier is in mute condition) is a function essentially of : Cout , Csvr . Being: STA7360 T1 120 * Cout T2 1200 * Csvr The turn-on delay is given by: T1+T2 STEREO T2 BRIDGE The best performance is obtained by driving the st-by pin with a ramp having a slope slower than 2V/ms TURN-OFF A turn-off pop can occur if the st-by pin goes low with a short time constant.This pop is due to the fast switch-off of the internal current generator of the amplifier.If the voltage present across the load becomes rapidly zero (due to the fast switch off) a small pop occurs, depending also on Cout,Rload. The parameters that set the switch off time constant of the st-by pin are: s the st-by capacitor (C4) s s Figure 34. b) Csvr = 47 F the SVR capacitor (Csvr) resistors connected from st-by pin to the logical input (Rext) BALANCED INPUT IN BRIDGE CONFIGURATION A helpful characteristic of the STA7360 is that,in bridge configuration, a signal present on both the input capacitors is amplified by the same amount and it is present in phase at the outputs,so this signal does not produce effects on the load.The typical value of CMRR is 46dB. Looking at fig 35, we can see that a noise signal from the ground of the power amplifier to the ground of the hypothetical preamplifier is amplified of a factor equal to the gain of the amplifier (2 * Gv). Using a configuration of fig. 36 the same ground noise is present at the output multiplied by the factor 2 * Gv/200. This means less distortion,less noise (e.g. motor cassette noise) and/or a simplification of the layout of PC board. The only limitation of this balanced input is the maximum amplitude of common mode signals (few tens of millivolt) to avoid a loss of output power due to the common mode signal on the output, but in a large number of cases this signal is within this range. c) Csvr = 100 F (*) These parameters must be validated after final silicon characterization. 15/18 STA7360 Figure 35. Figure 36. 16/18 STA7360 DIM. MIN. A B C D E F G G1 H1 H2 L L1 L2 L3 L4 L7 M M1 S S1 Dia1 21.9 21.7 17.4 17.25 10.3 2.65 4.25 4.73 1.9 1.9 3.65 0.49 0.88 1.45 16.75 19.6 mm TYP. MAX. 5 2.65 1.6 1 0.55 0.95 1.7 17 1.95 17.25 20.2 22.2 22.1 17.5 10.7 4.55 5.08 22.5 22.5 18.1 17.75 10.9 2.9 4.85 5.43 2.6 2.6 3.85 0.862 0.854 0.685 0.679 0.406 0.104 0.167 0.186 0.075 0.075 0.144 0.019 0.035 0.057 0.659 0.772 MIN. inch TYP. MAX. 0.197 0.104 0.063 0.039 0.022 0.037 0.067 0.669 0.077 0.679 0.795 0.874 0.87 0.689 0.421 0.179 0.200 0.886 0.886 0.713 0.699 0.429 0.114 0.191 0.214 0.102 0.102 0.152 OUTLINE AND MECHANICAL DATA Multiwatt11 V 17/18 STA7360 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2003 STMicroelectronics - All rights reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States www.st.com 18/18 |
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