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XRT7298
'6676 ( ,QWHJUDWHG /LQH 7UDQVPLWWHU
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FEA TURES
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APPLICA TIONS
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GENERAL DESCRIPTION
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ORDERING INFORMATION
Part No.
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BLOCK DIAGRAM
Figure 1. XRT7298 Block Diagram
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PIN CONFIGURATION
5&/. 5/223 //223 '6676( 7$26 9

51'$7$ 53'$7$ ,&7 7;/(9 9
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28 Lead PDIP (0.600")
28 Lead SOJ (Jedec,0.300")
PIN DESCRIPTION
Pin #

Symbol
5&/. 5/223 //223
T ype
, , ,
Description
'6676 ( 7$26 9''' 73'$7$ 71'$7$ 7&/. *1'' (1&2',6 '(&2',6
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Receive Clock Input.
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PIN DESCRIPTION (CONT'D)
Pin #

Symbol
%39
T ype
2 2 2 2 2 2 , , 2 2 , , , ,
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Bipolar Violation Output
Description
Note: 1 If a bipolarviolationoccurs,RPOS andRNEG cancorrespond thedecoded to versions of RNDAT A andRPDAT A respectively If . DECODIS is high,RPOS andRNEG alwaystrackRPDAT A andRNDAT A respectively .
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ELECTRICAL CHARACTERISTICS (See Figure 8 ) T est Conditions: VDD = 5V 5%, T A = -40GC to +85GC, unless otherwise specified. All timing characteristics are measuredwith 10pF loading.
Symbol Parameter Min. T yp. Max. Units
AC Electrical Characteristics
W5 W) W768 W7+2 W7'< W5 W) W568 W5+2 W5 W) W5'< 9''' 9''$ 9,/ 9,+ 92/ 92+ ,/ &, &/
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DC Electrical Characteristics
9'' *1'' 9'''
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Notes: 1 Whentheencoders enabled, handlingdelayof six TCLK clockcyclesfor B3ZS andseven clockcyclesfor HDB3 i a alwaysexists between TPDA T A/TNDAT A andTTIP/TRING. The handlingdelayis reduced tothreeanda halfcycleswhentheen coderis disabled. 2 Whenthedecoders enabled, handlingdelayof six anda halfRCLK clockcycleswill alwaysexist between i a RPDAT A/RNDA A T andRPOS/RNEG. The handlingdelayis reduced oneandhalfRCLK clockcycleswhenthedecoders disabled. to i 3 Supply currentis measuredwithtransmittersendingall ones AMI signal andwithT ransmit Level (TXLEV) set to high. 4 All inputs exceptpin 19, 20 andpin 26.
Specifications are subject to changewithout notice
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ABSOLUTE MAXIMUM RATINGS
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SYSTEM DESCRIPTION B3ZS/HDB3 ENCODER
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B3ZS/HDB3 DECODER
TRANSMIT ALL ONE SELECT
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PULSE SHAPER
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Note: 1 T ransformer= Pulse EngineeringPE 65966, PE 65967 SurfaceMount,Same T ransformerfor DS3, STS-1 and E3.
Figure 2. T ransmit Pulse Amplitude T est Circuit Parameter Value
2+ 9UPV 2+
DRIVER MONITOR
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T able1. T ransmit T ransformer Characteristics
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DS3 SIGNAL REQUIREMENTS AT THE DSX
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Notes:
1
Parameter
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Specification
The pulse template proposedby G.703 standardsis shownin Figure 4 andspecifiedin T able4 The proposed G.703 standards furtherstatethatthevoltage atimeslot containing must notexceed in a0 of thepeakpulse amplitude, except ortheresidue f of preceding pulses. 2 The powerlevels specified bytheproposed G.703 standardsareidentical except hatthepoweris tobe measuredin 3kHz bands. t 3 The all 1s pattern must bea pureall 1s signal, withoutframingor othercontrolbits.
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T able2. DSX*3 Interconnection Specification
Lower Curve
Upper Curve Equation
5
7 { { 7 { { 7
T ime
> VLQ > 7 @@
7 { { 7 {
T ime
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5
Equation
7
T able3. DSX-3 Pulse T emplateBoundaries for ANSI T1.404 Standards (See Figure 3. )
Lower Curve
Upper Curve Equation
{ 7 { { 7 { { 7 {
T ime
> VLQ > 7@@
5
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5
Equation
7
T able4. DSX-3 Pulse T emplateBoundaries for Bellcore TR-NWT -000499Standards (See Figure 4)
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NormalizedAmplitudes NormalizedAmplitudes

T ime Slots-Normalized to Peak Location
T ime Slots-Normalized to Peak Location
Figure 3. DSX-3 Isolated Pulse T emplatefor ANSI T1.404 Standards
Figure 4. DSX-3 Isolated Pulse T emplatefor Bellcore TR-NWT -000499
Parameter Specification
STS-1 SIGNAL REQUIREMENTS
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Figure 5
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T able5. STSX-1 Interconnection Specification
NormalizedAmplitude

i i i i i
Figure 5. STSX-1 Isolated Pulse T emplatefor Bellcore T A-TSY -000253
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E3 SIGNAL REQUIREMENTS
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Figure 6. CCITT G.703 Pulse Mark at the 34,368-kbit/sInterface
Parameter
3XOVH 6KDSH 1RPLQDOO\ 5HFWDQJXODU
Value
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Figure 6
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2QH FRD[LDO SDLU : UHVLVWLYH 9 9
9
QV WR
WR
T able6. E3 Pulse Specifications
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XRT7298
W5 W)
7&/. W768 W7+2
73'$7$ 25 71'$7$ W7'< 77,3 25 75,1*
W5
W)
5&/. W568 W5+2
53'$7$ 25 51'$7$
W5
W)
5&/.2 W5'<
532651(*
Figure 7. T iming Diagrams for System Interface
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XRT7298

9
9

53'$7$
51'$7$
V
5326
51(*
%39
%39 &RUUHVSRQGLQJ 7R &RGLQJ 5XOH
%39 1RW &RUUHVSRQGLQJ 7R &RGLQJ 5XOH
&RGLQJ (UURU
Note: The delayfromRPDAT A/RNDA A to RPOS/RNEG/RNRZ is notshown here. T
Figure 8. Bipolar Violation Example for B3ZS Mode
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XRT7298
9&& 5, (& 47 %
OUTPUTS RECEIVER MONITOR
6 6: ',3
5/26 73
5/2/ 73
/ 2 6 7 + 5
9&&
5 .
5 .
U1 XRT7295
,1387 6,*1$/ % & 2) 5/2/ 5/26 5,1 5 /267+5 5(4% ,&7 5&/. 51'$7$ 53'$7$
U2 XRT7298
//223 5/223 '6676( 5&/. 7$26 ,&7 51'$7$ 7;/(9 53'$7$ (1&2',6 '(&2',6

6 //223 5/223 7( 7$26 7;/(9 ,&7 (1&2',6 '(&2',6
5 5 5 3

(;7(51$/ &/2&. %
70& 5 & 2) /3) 9 ' ' $ )(55,7( %($' & 2) %7 (;&/. /3) 70&

5
*1' 5&/.2 % 7&/. 7&/. 5326 51(* 3//287 % 71'$7$ 71'$7$ 5&/.2 5326 51(* 3//287
6: ',3
5 *1'$ *1'& *1'' 9 ' ' & 9 ' ' ' &
RECEIVER OUTPUTS
% 73'$7$ 73'$7$
75,1*
5
7
%
77,3

77,3 2) 05,1* 07,3 *1'' '02 '02 %39 9 ' ' $ *1'$ 9 ' ' ' %7

5 5

5
3(
75,1*
3 9&& 5; & 2) ( 2) %39
TRANSMITER MONITOR OUTPUTS
75$16)250(5 38/6( (1*,1((5,1* 3( 3( ,1 685)$&( 02817
& 2)
3 9&& 7; ( 2) & 2)
)(55,7( %($' )$,5 5,7(
& )(55,7( %($' 2)
Figure 9. Evaluation System Schematic
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XRT7298
28 LEAD PLASTIC DUAL-IN-LINE (600 MIL PDIP)
Rev. 1.00
E1

D A2 A1 B e B1
E
Seating Plane
A L
,
eA eB
C
INCHES SYMBOL
$ $ $ % % & ' ( ( H H H /
MILLIMETERS MIN

MIN

MAX

MAX

%6& %6& G G G G
%6& %6& G G G G
,
Note: The controldimension theinchcolumn is
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XRT7298
28 LEAD SMALL OUTLINE J LEAD (300 MIL JEDEC SOJ)
Rev. 3.00
D
28
15
E
1 14
H
Seating Plane e B A1
A2 C
A R E1
INCHES SYMBOL A A1 A2 B C D E E1 e H R MIN 0.120 0.025 0.090 0.014 0.008 0.697 0.292 0.262 0.335 0.030 MAX 0.140 -----0.115 0.020 0.013 0.712 0.300 0.272 0.347 0.040
MILLIMETERS MIN 3.05 0.64 2.29 0.36 0.20 17.70 7.42 6.65 8.51 0.76 MAX 3.56 -----2.92 0.51 0.30 18.08 7.62 6.91 8.81 1.02
0.050 BSC
1.27 BSC
Note: The control dimension is the inch column
Rev. 1.01 15
XRT7298
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