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| 19-2493; Rev 2; 11/03 2.4GHz 802.11b Zero-IF Transceivers General Description The MAX2820/MAX2821 single-chip zero-IF transceivers are designed for the 802.11b (11Mbps) applications operating in the 2.4GHz to 2.5GHz ISM band. The transceivers are nearly identical, except the MAX2821 provides a low-power shutdown mode and an analog voltage reference output feature and the MAX2820 does not. The transceivers include all the circuitry required to implement an 802.11b RF-to-baseband transceiver solution, providing a fully integrated receive path, transmit path, VCO, frequency synthesis, and baseband/control interface. Only a PA, RF switch, RF BPF, and a small number of passive components are needed to form the complete radio front-end solution. The ICs eliminate the need for external IF and baseband filters by utilizing a direct-conversion radio architecture and monolithic baseband filters for both receiver and transmitter. They are specifically optimized for 802.11b (11Mbps CCK) applications. The baseband filtering and RX and TX signal paths support the CCK modulation scheme for BER = 10 -5 at the required sensitivity levels. The devices are suitable for the full range of 802.11b data rates (1Mbps, 2Mbps, 5.5Mbps, and 11Mbps) and also the higher-rate 22Mbps PBCCTM standard. The MAX2820/MAX2821 are available in the very small 7mm x 7mm 48-lead QFN package. Features o 2.4GHz to 2.5GHz ISM Band Operation o 802.11b (11Mbps CCK and 22Mbps PBCC) PHY Compatible o Complete RF-to-Baseband Transceiver Direct-Conversion Upconverters and Downconverters Monolithic Low-Phase-Noise VCO Integrated Baseband Lowpass Filters Integrated PLL with 3-Wire Serial Interface Digital Bias Control for External PA Transmit Power Control (Range > 25dB) Receive Baseband AGC (Range > 65dB) Complete Baseband Interface Digital TX/RX Mode Control Analog Receive Level Detection o -97dBm RX Sensitivity at 1Mbps o -87dBm RX Sensitivity at 11Mbps o +2dBm Transmit Power (11Mbps CCK) o Single +2.7V to +3.6V Supply o Low-Current Shutdown Mode (MAX2821 only) o Very Small 48-Pin QFN Package (s) MAX2820/MAX2821 Applications 802.11b 11Mbps WLAN 802.11b+ 22Mbps PBCC High-Data-Rate WLAN 802.11a + b Dual-Band WLAN 2.4GHz ISM Band Radios Ordering Information PART MAX2820EGM-TD MAX2820ETM+TD MAX2821EGM-TD MAX2821ETM+TD TEMP RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C PIN-PACKAGE 48 QFN 48 QFN Lead Free 48 QFN 48 QFN Lead Free PBCC is a trademark of Texas Instruments, Inc. Pin Configuration/Functional Diagram and Typical Application Circuit appear at end of data sheet. ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. 2.4GHz 802.11b Zero-IF Transceivers MAX2820/MAX2821 ABSOLUTE MAXIMUM RATINGS VCC Pins to GND ...................................................-0.3V to +4.2V RF Inputs: RX_RFP, RX_RFN to GND.........-0.3V to (VCC + 0.3V) RF Outputs: TX_RFP, TX_RFN to GND..................-0.3V to +4.2V Baseband Inputs: TX_BBIP, TX_BBIN, TX_BBQP, TX_BBQN to GND ...................................-0.3V to (VCC + 0.3V) Baseband Outputs: RX_BBIP, RX_BBIN, RX_BBQP, RX_BBQN to GND ...................................-0.3V to (VCC + 0.3V) Analog Inputs: RX_AGC, TX_GC, TUNE, ROSCN, ROSCP to GND .......................................-0.3V to (VCC + 0.3V) Analog Outputs: PA_BIAS, CP_OUT, VREF to GND....................................................-0.3V to (VCC + 0.3V) Digital Inputs: RX_ON, TX_ON, SHDNB, CSB, SCLK, DIN, RF_GAIN, RX_1K to GND...............-0.3V to (VCC + 0.3V) Bias Voltages: RBIAS, BYP ..................................+0.9V to +1.5V Short-Circuit Duration Digital Outputs: DOUT, RX_DET .........10s RF Input Power: RX_RFN, RX_RFP.................................+10dBm Continuous Power Dissipation (TA = +70C) 48-Lead QFN (derate 27.0mW/C above +70C) .....2162mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +160C Lead Temperature (soldering, 10s) .................................+300C Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. CAUTION! ESD SENSITIVE DEVICE DC ELECTRICAL CHARACTERISTICS (MAX2820/MAX2821 EV kit: VCC = +2.7V to +3.6V, RF_GAIN = VIH, 0V VTX_GC +2.0V, 0V VRX_AGC +2.0V, RBIAS = 12k, no input signals at RF and baseband inputs, all RF inputs and outputs terminated into 50, receiver baseband outputs are open, transmitter baseband inputs biased at +1.2V, registers set to default power-up settings, TA = -40C to +85C, unless otherwise noted. Typical values are at VCC = +2.7V, TA = +25C, unless otherwise noted.) (Note 1) PARAMETERS Supply Voltage Shutdown-Mode Supply Current (MAX2821 Only) Standby-Mode Supply Current Receive-Mode Supply Current Transmit-Mode Supply Current SHDNB = VIL, RX_ON = VIL, TX_ON = VIL SHDNB = VIH, RX_ON = VIL, TX_ON = VIL SHDNB = VIH, RX_ON = VIH, TX_ON = VIL SHDNB = VIH, RX_ON = VIL, TX_ON = VIH TA = -40C to +85C TA = +25C TA = -40C to +85C TA = +25C TA = -40C to +85C TA = +25C TA = -40C to +85C VCC - 0.5 0.5 -5 -5 VCC - 0.5 0.5 50 1.25 15 TA = -40C to +85C, ILOAD = 2mA 1.1 1.2 25 1.3 +5 +5 70 80 CONDITIONS MIN 2.7 2 25 TYP MAX 3.6 50 35 40 100 110 85 90 UNITS V A mA mA mA LOGIC INPUTS: SHDNB, RX_ON, TX_ON, SCLK, DIN, CSB, RF_GAIN Digital Input Voltage High (VIH) Digital Input Voltage Low (VIL) Digital Input Current High (IIH) Digital Input Current Low (IIL) LOGIC OUTPUTS: DOUT, RX_DET Digital Output Voltage High (VOH) Sourcing 100A Digital Output Voltage Low (VOL) RX BASEBAND I/O RX_AGC Input Resistance RX I/Q Common-Mode Voltage RX I/Q Output DC Offsets VOLTAGE REFERENCE Reference Voltage Output Output Impedance V 0V VRX_AGC +2.0V k V mV Sinking 100A V V A A V V 2 _______________________________________________________________________________________ 2.4GHz 802.11b Zero-IF Transceivers DC ELECTRICAL CHARACTERISTICS (continued) (MAX2820/MAX2821 EV kit: VCC = +2.7V to +3.6V, RF_GAIN = VIH, 0V VTX_GC +2.0V, 0V VRX_AGC +2.0V, RBIAS = 12k, no input signals at RF and baseband inputs, all RF inputs and outputs terminated into 50, receiver baseband outputs are open, transmitter baseband inputs biased at +1.2V, registers set to default power-up settings, TA = -40C to +85C, unless otherwise noted. Typical values are at VCC = +2.7V, TA = +25C, unless otherwise noted.) (Note 1) PARAMETERS TX BASEBAND I/O TX BB Input Common-Mode Range TX BBI and BBQ Input Bias Current TX BB Input Impedance TX_GC Input Bias Current TX_GC Input Impedance Reference Oscillator Input Impedance Differential resistance 0V VTX_GC +2.0V Resistance 1.0 1.2 -10 100 10 250 1.4 V A k A k CONDITIONS MIN TYP MAX UNITS MAX2820/MAX2821 REFERENCE OSCILLATOR INPUT 20 k AC ELECTRICAL CHARACTERISTICS--RECEIVE MODE (MAX2820/MAX2821 EV kit: VCC = +2.7V to +3.6V, fRF and fLO = 2400MHz to 2499MHz, fOSC = 22MHz or 44MHz, receive baseband outputs = 500mVP-P, SHDNB = RX_ON = VIH, TX_ON = VIL, CSB = VIH, SCLK = DIN = VIL, RF_GAIN = VIH, 0V VRX_AGC +2.0V, RBIAS = 12k, ICP = +2mA, BWPLL = 45kHz, differential RF input matched to 50, registers set to default power-up settings, TA = +25C, unless otherwise noted. Typical values are at VCC = +2.7V, fLO = 2437MHz, fOSC = 22MHz, unless otherwise noted.) (Note 1) PARAMETER RF Frequency Range LO Frequency Range RF_GAIN = VIH, VRX_AGC = 0V RF_GAIN = VIH, VRX_AGC = +2.0V RF_GAIN = VIL, VRX_AGC = 0V RF_GAIN = VIL, VRX_AGC = +2.0V RF Gain Step DSB Noise Figure (Notes 3, 11) Adjacent Channel Rejection Input Third-Order Intercept Point (Note 5) Input Second-Order Intercept Point (Note 6) TA = +25C TA = -40C to +85C TA = +25C TA = +25C TA = +25C CONDITIONS MIN 2400 2400 97 95 33 dB 75 2 30 3.5 4.5 34 49 -14 18 22 60 dB dBm dBm 4.5 dB dB 105 TYP MAX 2499 2499 UNITS MHz MHz RECEIVER CASCADE PERFORMANCE (RF INPUT TO BASEBAND OUTPUT) Voltage Gain (Note 2) From RF_GAIN = VIH to RF_GAIN =VIL RF_GAIN = VIH, RX gain 80dB RF_GAIN = VIH, RX gain = 50dB RF_GAIN = VIL, RX gain = 50dB RX gain = 70dB (Note 4) RF_GAIN = VIH, RX gain = 80dB RF_GAIN = VIL, RX gain = 50dB RF_GAIN = VIH, RX gain = 80dB RF_GAIN = VIL, RX gain = 50dB _______________________________________________________________________________________ 3 2.4GHz 802.11b Zero-IF Transceivers MAX2820/MAX2821 AC ELECTRICAL CHARACTERISTICS--RECEIVE MODE (continued) (MAX2820/MAX2821 EV kit: VCC = +2.7V to +3.6V, fRF and fLO = 2400MHz to 2499MHz, fOSC = 22MHz or 44MHz, receive baseband outputs = 500mVP-P, SHDNB = RX_ON = VIH, TX_ON = VIL, CSB = VIH, SCLK = DIN = VIL, RF_GAIN = VIH, 0V VRX_AGC +2.0V, RBIAS = 12k, ICP = +2mA, BWPLL = 45kHz, differential RF input matched to 50, registers set to default power-up settings, TA = +25C, unless otherwise noted. Typical values are at VCC = +2.7V, fLO = 2437MHz, fOSC = 22MHz, unless otherwise noted.) (Note 1) PARAMETER LO Leakage Input Return Loss BASEBAND FILTER RESPONSE -3dB Frequency Default bandwidth setting BW (2:0) = (010) At 12.5MHz Attenuation Relative to Passband At 16MHz At 20MHz At 25MHz BASEBAND OUTPUT CHARACTERISTICS RX I/Q Gain Imbalance RX I/Q Phase Quadrature Imbalance RX I/Q Output 1dB Compression RX I/Q Output THD BASEBAND AGC AMPLIFIER AGC Range AGC Slope AGC Response Time BASEBAND RX PEAK LEVEL DETECTION RF_GAIN = VIH, RX_DET = VOL to VOH RF_GAIN = VIL, RX_DET = VOH to VOL RX Detector Hysteresis RX Detector Rise Time With 3dB overdrive -49 dBm -54 5 1 dB s VRX_AGC = 0 to +2.0V Peak gain slope 20dB gain step, 80dB to 60dB, settling to 1dB 70 60 2 dB dB/V s Differential voltage into 5k VOUT = 500mVP-P at 5.5MHz, ZL = 5k||5pF -1 -5 1 -35 +1 +5 dB Degrees VP-P dBc 7 40 65 70 85 dB MHz With external match RECEIVER BASEBAND CONDITIONS MIN TYP -65 15 MAX UNITS dBm dB RX Detector Trip Point (at RX_RF) CW signal AC ELECTRICAL CHARACTERISTICS--TRANSMIT MODE (MAX2820/MAX2821 EV kit: VCC = +2.7V to +3.6V, fRF and fLO = 2400MHz to 2499MHz, fOSC = 22MHz or 44MHz, transmit baseband inputs = 400mVP-P, SHDNB = TX_ON = VIH, RX_ON = VIL, CSB = VIH, 0V VTX_GC +2.0V, RBIAS = 12k, ICP = +2mA, BWPLL = 45kHz, differential RF output matched to 50 through a balun, baseband input biased at +1.2V, registers set to default power-up settings, TA = +25C, unless otherwise noted. Typical values are at VCC = +2.7V, fLO = 2437MHz, fOSC = 22MHz, unless otherwise noted.) PARAMETER RF Output Frequency Range LO Output Frequency Range CONDITIONS MIN 2400 2400 TYP MAX 2499 2499 UNITS MHz MHz TRANSMIT SIGNAL PATH: BASEBAND INPUT TO RF OUTPUT 4 _______________________________________________________________________________________ 2.4GHz 802.11b Zero-IF Transceivers AC ELECTRICAL CHARACTERISTICS--TRANSMIT MODE (continued) (MAX2820/MAX2821 EV kit: VCC = +2.7V to +3.6V, fRF and fLO = 2400MHz to 2499MHz, fOSC = 22MHz or 44MHz, transmit baseband inputs = 400mVP-P, SHDNB = TX_ON = VIH, RX_ON = VIL, CSB = VIH, 0V VTX_GC +2.0V, RBIAS = 12k, ICP = +2mA, BWPLL = 45kHz, differential RF output matched to 50 through a balun, baseband input biased at +1.2V, registers set to default power-up settings, TA = +25C, unless otherwise noted. Typical values are at VCC = +2.7V, fLO = 2437MHz, fOSC = 22MHz, unless otherwise noted.) PARAMETER CONDITIONS VIN = 400mVP-P at 5.5MHz, VTX_GC = 0V, I/Q CW signal (Note 7) TA = +25C TA = -40C to +85C MIN -1 -2 -37 dBc -59 -40 -30 -80 -40 -55 -60 -43 -45 -135 15 10 At 22MHz At 44MHz 0V VTX_GC +2.0V Peak gain slope VTX_GC = +2.0V to 0V step 25 50 30 40 0.3 dBm/Hz dB MHz dB dBm dBm dBc TYP +3 dBm MAX UNITS MAX2820/MAX2821 TX RF Output Power TX RF ACPR (Note 8) -22MHz fOFFSET -11MHz, 11MHz fOFFSET 22MHz -33MHz fOFFSET < -22MHz, 22MHz < fOFFSET 33MHz Unwanted sideband fRF = 2400MHz to 2483MHz 2 x fLO 3 x fLO fRF < 2400MHz fRF = 2500MHz to 3350MHz fRF > 3350MHz fOFFSET 22MHz, 0V VTX_GC +2.0V With external match LO signal Spurs > 22MHz In-Band Spurious Signals Relative to Modulated Carrier TX RF Harmonics TX RF Spurious Signal Emissions (Outside 2400MHz to 2483.5MHz) Nonharmonic Signals TX RF Output Noise TX RF Output Return Loss TX BASEBAND FILTER RESPONSE -3dB Frequency Attenuation Relative to Passband TX GAIN-CONTROL CHARACTERISTICS Gain-Control Range Gain-Control Slope Gain-Control Response Time dB dB/V s AC ELECTRICAL CHARACTERISTICS--PA BIAS (MAX2820/MAX2821 EV kit: VCC = +2.7V to +3.6V, SHDNB = VIH, TX_ON = VIH, CSB = VIH, PA_BIAS enabled, RBIAS = 12k, registers set to default power-up settings, TA = +25C, unless otherwise noted. Typical values are at VCC = +2.7V, unless otherwise noted.) PARAMETER Resolution Full-Scale Output Current LSB Size Output Voltage Compliance Range Settling Time (Note 11) Relative to rising edge of CSB, zero to fullscale step 0000 1111, settle to 1/2 LSB, 2pF load 1.0 CONDITIONS MIN TYP 4 300 20 1.2 1 1.3 MAX UNITS Bits A A V s _______________________________________________________________________________________ 5 2.4GHz 802.11b Zero-IF Transceivers MAX2820/MAX2821 AC ELECTRICAL CHARACTERISTICS--SYNTHESIZER (MAX2820/MAX2821 EV kit: VCC = +2.7V to +3.6V, fRF and fLO = 2400MHz to 2499MHz, fOSC = 22MHz or 44MHz, SHDNB = VIH, CSB = VIH, RBIAS = 12k, ICP = +2mA, BWPLL = 45kHz, registers set to default power-up settings, TA = +25C, unless otherwise noted. Typical values are at VCC = +2.7V, fLO = 2437MHz, fOSC = 22MHz, unless otherwise noted.) (Note 11) PARAMETER FREQUENCY SYNTHESIZER LO Frequency Range Reference Frequency Channel Spacing Charge-Pump Output Current Charge-Pump Compliance Range -11MHz fOFFSET 11MHz Reference Spur Level (Note 10) -22MHz fOFFSET < -11MHz, 11MHz < fOFFSET 22MHz fOFFSET < -22MHz, fOFFSET > 22MHz Closed-Loop Phase Noise Closed-Loop Integrated Phase Noise Reference Oscillator Input Level VOLTAGE-CONTROLLED OSCILLATOR VCO Tuning Voltage Range VCO Tuning Gain fLO = 2400MHz fLO = 2499MHz 0.4 170 130 2.3 V MHz/V fOFFSET = 10kHz fOFFSET = 100kHz Noise integrated from 100Hz to 10MHz, measured at the TX_RF output AC-coupled sine wave input 200 ICP = 0 ICP = 1 0.4 -41 -75 -90 -80 -87 2.5 300 500 dBc/Hz RMS mVP-P dBc R(0) = 0 R(0) = 1 1 2 1 VCC - 0.4 2400 22 44 2499 MHz MHz MHz mA V CONDITIONS MIN TYP MAX UNITS AC ELECTRICAL CHARACTERISTICS--SYSTEM TIMING (MAX2820/MAX2821 EV kit: VCC = +2.7V to +3.6V, fRF and fLO = 2400MHz to 2499MHz, fOSC = 22MHz or 44MHz, SHDNB = VIH, CSB = VIH, RBIAS = 12k, ICP = +2mA, BWLOOP = 45kHz, registers set to default power-up settings, TA = +25C, unless otherwise noted. Typical values are at VCC = +2.7V, fLO = 2437MHz, fOSC = 22MHz, unless otherwise noted.) (Note 11) PARAMETER Channel-Switching Time CONDITIONS fLO = 2400MHz 2499MHz, fLO settles to 10kHz (Note 9) RX to TX, fLO settles to within 30kHz, relative to rising edge of TX_ON TX to RX, fLO settles to within 30kHz, relative to rising edge of RX_ON MIN TYP 150 MAX 200 5 s 10 UNITS s RX/TX Turnaround Time 6 _______________________________________________________________________________________ 2.4GHz 802.11b Zero-IF Transceivers AC ELECTRICAL CHARACTERISTICS--SYSTEM TIMING (continued) (MAX2820/MAX2821 EV kit: VCC = +2.7V to +3.6V, fRF and fLO = 2400MHz to 2499MHz, fOSC = 22MHz or 44MHz, SHDNB = VIH, CSB = VIH, RBIAS = 12k, ICP = +2mA, BWLOOP = 45kHz, registers set to default power-up settings, TA = +25C, unless otherwise noted. Typical values are at VCC = +2.7V, fLO = 2437MHz, fOSC = 22MHz, unless otherwise noted.) PARAMETER Standby-to-Receive Mode Standby-to-Transmit Mode CONDITIONS Standby to RX, fLO settles to within 30kHz, relative to rising edge of RX_ON Standby to TX, fLO settles to within 30kHz, relative to rising edge of TX_ON MIN TYP MAX 5 10 UNITS s s MAX2820/MAX2821 AC ELECTRICAL CHARACTERISTICS--SERIAL INTERFACE TIMING (MAX2820/MAX2821 EV kit: VCC = +2.7V to +3.6V, registers set to default power-up settings, TA = +25C, unless otherwise noted. (Note 11) PARAMETER SERIAL INTERFACE TIMING (See Figure 1) tCSO tCSS tDS tDH tCH tCL tCSH tCSW tCS1 fCLK SCLK rising edge to CSB falling edge wait time Falling edge of CSB to rising edge of first SCLK time Data-to-serial clock setup time Data-to-clock hold time Serial clock pulse-width high Clock pulse-width low Last SCLK rising edge to rising edge of CSB CSB high pulse width Time between the rising edge of CSB and the next rising edge of SCLK Clock frequency 5 5 5 10 10 10 5 10 5 50 ns ns ns ns ns ns ns ns ns MHz CONDITIONS MIN TYP MAX UNITS Parameters are production tested at +25C only. Min/max limits over temperature are guaranteed by design and characterization. Note 2: Defined as the baseband differential RMS output voltage divided by the RMS input voltage (at the RF balun input). Note 3: Noise-figure specification excludes the loss of the external balun. The external balun loss is typically ~0.5dB. Note 4: CCK interferer at 25MHz offset. Desired signal equals -73dBm. Interferer amplitude increases until baseband output from interferer is 10dB below desired signal. Adjacent channel rejection = Pinterferer - Pdesired. Note 5: Measured at balun input. Two CW tones at -43dBm with 15MHz and 25MHz spacing from the MAX2820/MAX2821 channel frequency. IP3 is computed from 5MHz IMD3 product measured at the RX I/Q output. Note 6: Two CW interferers at -38dBm with 24.5MHz and 25.5MHz spacing from the MAX2820/MAX2821 channel frequency. IP2 is computed from the 1MHz IMD2 product measured at the RX I/Q output. Note 7: Output power measured after the matching and balun. TX gain is set to maximum. Note 8: Adjacent and alternate channel power relative to the desired signal. TX gain is adjusted until the output power is -1dBm. Power measured with 100kHz video BW and 100kHz resolution BW. Note 9: Time required to reprogram the PLL, change the operating channel, and wait for the operating channel center frequency to settle within 10kHz of the nominal (final) channel frequency. Note 10: Relative amplitude of reference spurious products appearing in the TX RF output spectrum relative to a CW tone at 0.5MHz offset from the LO. Note 11: Min/max limits are guaranteed by design and characterization. Note 1: _______________________________________________________________________________________ 7 2.4GHz 802.11b Zero-IF Transceivers MAX2820/MAX2821 Typical Operating Characteristics (MAX2820/MAX2821 EV kit, VCC = +2.7V, fBB = 1MHz, fLO = 2450MHz, receive baseband outputs = 500mVP-P, transmit baseband inputs = 400mVP-P, ICP = +2mA, BWPLL = 45kHz, differential RF input/output matched to 50 through a balun, baseband input biased at +1.2V, registers set to default power-up settings, TA = +25C, unless otherwise noted.) SUPPLY CURRENT vs. TEMPERATURE MAX2820 toc01 SUPPLY CURRENT vs. SUPPLY VOLTAGE MAX2820 toc02 RECEIVER VOLTAGE GAIN vs. GAIN-CONTROL VOLTAGE MAX2820 toc03 100 90 80 70 ICC (mA) RECEIVE, VRF_GAIN = VIH 100 90 80 70 ICC (mA) RECEIVE, VRF_GAIN = VIH 120 100 RX VOLTAGE GAIN (dB) 80 60 VRF_GAIN = VIL 40 20 0 VOUT = 500mVP-P fBB = 1MHz fLO = 2450MHz 0 0.5 1.0 VRX_AGC (V) 1.5 VRF_GAIN = VIH 60 50 40 30 20 10 0 -40 TRANSMIT RECEIVE, VRF_GAIN = VIL 60 50 40 30 20 TRANSMIT RECEIVE, VRF_GAIN = VIL STANDBY 10 0 85 2.7 3.0 STANDBY 3.3 VCC (V) 3.6 -15 10 35 60 2.0 TEMPERATURE (C) RECEIVER VOLTAGE GAIN vs. RF FREQUENCY MAX2820 toc04 RECEIVER NOISE FIGURE vs. GAIN MAX2820 toc05 RECEIVER DETECTOR HYSTERESIS vs. INPUT POWER MAX2820 toc06 MAX2820 toc09 40 fBB = 1MHz 35 RX VOLTAGE GAIN (dB) 30 25 20 15 10 5 0 2400 2420 2440 2460 2480 VRF_GAIN = VIL, VRX_AGC = 2.0V VRF_GAIN = VIH, VRX_AGC = 2.0V 50 45 40 NOISE FIGURE (dB) 35 30 25 20 15 10 5 0 fBB = 1MHz fLO = 2450MHz 0 20 40 VRF_GAIN = VIH VRF_GAIN = VIL HIGH LOGIC LEVEL HIGH-GAIN MODE LOW HIGH LOW-GAIN MODE LOW 2500 60 80 100 -65 -60 -55 -50 PIN (dBm) -45 -40 -35 RF FREQUENCY (MHz) RX GAIN (dB) RECEIVER FILTER RESPONSE (1kHz TO 1MHz) MAX2820 toc07 RECEIVER FILTER RESPONSE (1MHz TO 100MHz) MAX2820 toc08 RECEIVER LEAKAGE SPECTRUM -10 -20 RECEIVER LEAKAGE POWER (dBm) -30 -40 -50 -60 -70 -80 -90 -100 -120 VRF_GAIN = VIH fLO = 2400MHz 10 0 NORMALIZED RESPONSE (dB) -10 -20 -30 -40 -50 -60 -70 -80 -90 1 10 100 RX_1K = VIL RX_1K = VIH 10 0 NORMALIZED RESPONSE (dB) -10 -20 -30 -40 -50 -60 -70 -80 -90 f-3dB = 7.5MHz f-3dB = 8.5MHz 1000 1 10 FREQUENCY (MHz) 100 0 0.8 1.6 2.4 3.2 4.0 4.8 5.6 6.4 7.2 8.0 FREQUENCY (GHz) FREQUENCY (kHz) 8 _______________________________________________________________________________________ 2.4GHz 802.11b Zero-IF Transceivers Typical Operating Characteristics (continued) (MAX2820/MAX2821 EV kit, VCC = +2.7V, fBB = 1MHz, fLO = 2450MHz, receive baseband outputs = 500mVP-P, transmit baseband inputs = 400mVP-P, ICP = +2mA, BWPLL = 45kHz, differential RF input/output matched to 50 through a balun, baseband input biased at +1.2V, registers set to default power-up settings, TA = +25C, unless otherwise noted.) RECEIVER BASEBAND OUTPUT SPECTRUM -10 -20 -30 -40 -50 -60 -70 -80 0 5 10 15 20 25 30 35 40 45 50 FREQUENCY (MHz) VRF_GAIN = VIH RX GAIN = 50dB fBB = 5MHz fLO = 2450MHz MAX2820 toc10 MAX2820/MAX2821 TRANSMITTER OUTPUT POWER vs. FREQUENCY 3.5 TX OUTPUT POWER (dBm) -40C 3.0 2.5 2.0 1.5 1.0 0.5 0 2400 2420 2440 2460 2480 2500 FREQUENCY (MHz) +85C +25C MAX2820 toc11 0 BASEBAND OUTPUT POWER (dBm) 4.0 VIN = 400mVP-P VTX_GC = 0V 11Mbps CCK TRANSMITTER OUTPUT POWER vs. SUPPLY VOLTAGE MAX2820 toc12 TRANSMITTER OUTPUT SPECTRUM -20 TX OUTPUT POWER (dBm) -30 -40 -50 -60 -70 -80 -90 3.6 -33 -22 -11 0 11 22 33 RBW = 100kHz VIN = 400mVP-P 11Mbps CCK POUT = -1dBm MAX2820 toc13 4.0 3.5 -40C TX OUTPUT POWER (dBm) 3.0 2.5 2.0 +25C 1.5 1.0 0.5 0 2.7 3.0 VCC (V) 3.3 +85C VIN = 400mVP-P VTX_GC = 0V 11Mbps CCK -10 FREQUENCY OFFSET FROM CARRIER (MHz) TRANSMITTER OUTPUT SPECTRUM MAX2820toc14 TRANSMITTER GAIN vs. GAIN-CONTROL VOLTAGE -40C 0 NORMALIZED GAIN (dB) -5 -10 -15 -20 -25 -30 -35 0 0dB = MAX POUT AT +25C VIN = 400mVP-P 11Mbps CCK 0.5 1.0 VTX_GC (V) 1.5 2.0 +25C +85C MAX2820 toc15 10 0 TX OUTPUT POWER (dBm) -10 -20 -30 -40 -50 -60 -70 -80 CW SIGNAL fBB = 3.3MHz fLO = 2450MHz 5 0 0.8 1.6 2.4 3.2 4.0 4.8 5.6 6.4 7.2 8.0 FREQUENCY (GHz) _______________________________________________________________________________________ 9 2.4GHz 802.11b Zero-IF Transceivers MAX2820/MAX2821 Typical Operating Characteristics (continued) (MAX2820/MAX2821 EV kit, VCC = +2.7V, fBB = 1MHz, fLO = 2450MHz, receive baseband outputs = 500mVP-P, transmit baseband inputs = 400mVP-P, ICP = +2mA, BWPLL = 45kHz, differential RF input/output matched to 50 through a balun, baseband input biased at +1.2V, registers set to default power-up settings, TA = +25C, unless otherwise noted.) OPEN-LOOP PHASE NOISE vs. OFFSET FREQUENCY MAX2820 toc17 TRANSMITTER BASEBAND FILTER RESPONSE MAX2820 toc16 LO FREQUENCY vs. TUNING VOLTAGE 2.65 2.60 2.55 LO FREQUENCY (GHz) 2.50 2.45 2.40 2.35 2.30 +85C -40C +25C -40 -50 -60 PHASE NOISE (dBc/Hz) -70 -80 -90 -100 -110 -120 -130 -140 0 0.5 1.0 1.5 2.0 2.5 1 0 NORMALIZED RESPONSE (dB) -10 -20 -30 -40 -50 -60 0 fLO = 2450MHz fLO = 2450MHz MEASURED AT TX OUTPUT 2.25 2.20 10 20 30 40 50 60 70 80 90 100 FREQUENCY (MHz) VTUNE (V) 10 100 1000 OFFSET FREQUENCY (kHz) CLOSED-LOOP PHASE NOISE vs. OFFSET FREQUENCY MAX2820 toc19 VCO/PLL SETTING TIME 40 FREQUENCY ERROR (kHz) 30 20 10 0 -10 -20 -30 -40 -50 BWLOOP = 45kHz fLO = 2499MHz TO 2400MHz MAX2820 toc20 -50 -60 PHASE NOISE (dBc/Hz) -70 -80 -90 -100 -110 -120 -130 100 1k 10k 100k fLO = 2450MHz BWLOOP = 45kHz ICP = 2mA INT = 2.1RMS 50 1M 0 40 80 120 160 200 240 280 320 360 400 TIME (s) OFFSET FREQUENCY (Hz) 10 ______________________________________________________________________________________ MAX2820 toc18 10 2.4GHz 802.11b Zero-IF Transceivers Pin Configuration/Functional Diagram VCC_RMX VCC_BUF RX_BBQN RX_BBQP RX_DET RX_BBIN RX_BBIP RX_AGC MAX2820/MAX2821 RX_ON TX_ON RX_1K 38 48 VCC_LNA VREF (MAX2821 ONLY) RF_GAIN RX_RFN RX_RFP VCC_REF RBIAS TX_RFP TX_RFN 1 2 3 4 5 6 47 46 45 44 43 42 41 40 39 37 36 SHDNB PROGRAMMING AND MODE CONTROL RX LEVEL DETECTOR 35 VCC_RXF 34 VCC_LO 33 VCC_VCO 32 BYP 31 TUNE 90 7 8 9 0 30 GND_VCO MAX2820/ MAX2821 90 0 INTEGER-N SYNTHESIZER DOUT 29 GND_CP 28 CP_OUT 27 VCC_CP 26 CSB 25 SCLK 24 PA_BIAS 10 VCC_DRVR 11 TX_GC 12 13 14 15 16 17 18 19 20 21 22 23 VOS COMP SERIAL INTERFACE VCC_TMX TX_BBIN TX_BBIP TX_BBQP VCC_TXF TX_BBQN GND_DIG VCC_DIG N.C. ROSCP ROSCN ______________________________________________________________________________________ DIN 11 2.4GHz 802.11b Zero-IF Transceivers MAX2820/MAX2821 Pin Description PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 NAME VCC_LNA N.C. VREF RF_GAIN RX_RFN RX_RFP VCC_REF RBIAS TX_RFP TX_RFN PA_BIAS VCC_DRVR TX_GC VCC_TMX TX_BBIN TX_BBIP TX_BBQP TX_BBQN VCC_TXF GND_DIG DESCRIPTION Supply Voltage for LNA. Bypass with a capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. No Connection. Not internally connected. (MAX2820 only) Voltage Reference Output. (MAX2821 only) LNA Gain Select Logic Input. Logic high for LNA high-gain mode, logic low for LNA low-gain mode. Receiver LNA Negative Input. On-chip AC-coupling. Requires off-chip impedance match and connection to 2:1 balun. Receiver LNA Positive Input. On-chip AC-coupling. Requires off-chip impedance match and connection to 2:1 balun. Supply Voltage for Bias Circuitry and Autotuner. Bypass with a capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. Precision Bias Resistor Pin. Connect a 12k precision resistor ( 2%) to GND. Transmit Driver Amplifier Positive Output. On-chip pullup choke to VCC. Requires off-chip impedance match and connection to 4:1 balun. Transmit Driver Amplifier Negative Output. On-chip pullup choke to VCC. Requires off-chip impedance match and connection to 4:1 balun. Power-Amplifier Bias-Current Control Signal. Analog output. High-impedance, open-drain current source. Connect directly to bias-current control input on external PA. Supply Voltage for Transmit Driver. Bypass with a capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. Transmit Gain-Control Input. Analog high-impedance input. Connect directly to baseband IC DAC output. See the Typical Operating Characteristics for Transmitter Gain vs. Gain-Control Voltage. Supply Voltage for Transmit Mixer and VGA. Bypass with a capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. Transmit Negative In-Phase Baseband Input. Analog high-impedance differential input. Connect directly to baseband IC DAC voltage output. Requires a 1.2V common-mode voltage. Transmit Positive In-Phase Baseband Input. Analog high-impedance differential input. Connect directly to baseband IC DAC voltage output. Requires a 1.2V common-mode voltage. Transmit Positive Quadrature Baseband Input. Analog high-impedance differential input. Connect directly to baseband IC DAC voltage output. Requires a 1.2V common-mode voltage. Transmit Negative Quadrature Baseband Input. Analog high-impedance differential input. Connect directly to baseband IC DAC voltage output. Requires a 1.2V common-mode voltage. Supply Voltage for Transmit Baseband Filter. Bypass with capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. Digital Ground 12 ______________________________________________________________________________________ 2.4GHz 802.11b Zero-IF Transceivers Pin Description (continued) PIN 20 21 22 NAME VCC_DIG N.C. ROSCP DESCRIPTION Supply Voltage for Digital Circuitry. Bypass with capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. No Connection. Not internally connected. Reference Oscillator Positive Input. Analog, high-impedance differential input. DC-coupled. Requires external AC-coupling. Connect an external reference oscillator to this analog input. Reference Oscillator Negative Input. Analog, high-impedance differential input. DC-coupled. Requires external AC-coupling. Bypass this analog input to ground with capacitor for single-ended operation. 3-Wire Serial Interface Data Input. Digital, high-impedance input. Connect directly to baseband IC serial interface CMOS output. (SPI/QSPI/MICROWIRE compatible) 3-Wire Serial Interface Clock Input. Digital, high-impedance input. Connect this digital input directly to baseband IC serial interface CMOS output. (SPI/QSPI/MICROWIRE compatible). 3-Wire Serial Interface Enable Input. Digital, high-impedance input. Connect directly to baseband IC serial interface CMOS output. (SPI/QSPI/MICROWIRE compatible) Supply Voltage for PLL Charge Pump. Bypass with capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. PLL Charge-Pump Output. Analog, high-impedance output. Current source. Connect directly to the PLL loop filter input. PLL Charge-Pump Ground. Connect to PC board ground plane. VCO Ground. Connect to PC board ground plane. VCO Frequency Tuning Input. Analog voltage input. High impedance. Connect directly to the PLL loop filter output. VCO Bias Bypass Pin. Bypass with a 2000pF capacitor to ground. Supply Voltage for VCO. Bypass with capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. Important note: Operate off separate regulated supply voltage. Supply Voltage for VCO, LO Buffers, and LO Quadrature Circuitry. Bypass with capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. Supply Voltage for Receiver Baseband Filter. Bypass with capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. Active Low Shutdown Input. Digital CMOS input. High impedance. Connect directly to baseband IC mode control CMOS output. Logic low to disable all device functions. Logic high to enable normal chip operation. Serial Interface Data Output. Digital CMOS output. Optional connection. Receiver 1kHz Highpass Bandwidth Control. Digital CMOS input. Connect directly to baseband IC CMOS output. Controls receiver baseband highpass -3dB corner frequency; logic low for 10kHz, logic high for 1kHz. See the Applications Information section for proper use of this function. MAX2820/MAX2821 23 ROSCN 24 25 26 27 28 29 30 31 32 33 DIN SCLK CSB VCC_CP CP_OUT GND_CP GND_VCO TUNE BYP VCC_VCO 34 35 VCC_LO VCC_RXF 36 37 38 SHDNB DOUT RX_1K SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. ______________________________________________________________________________________ 13 2.4GHz 802.11b Zero-IF Transceivers MAX2820/MAX2821 Pin Description (continued) PIN 39 NAME RX_BBQP DESCRIPTION Receive Positive Quadrature Baseband Output. Analog low-impedance differential buffer output. Connect output directly to baseband ADC input. Internally biased to 1.2V common-mode voltage and can drive loads up to 5k || 5pF. Receive Negative Quadrature Baseband Output. Analog low-impedance differential buffer output. Connect output directly to baseband ADC input. Internally biased to 1.2V common-mode voltage and can drive loads up to 5k || 5pF. Receive Negative In-Phase Baseband Output. Analog low-impedance differential buffer output. Connect output directly to baseband ADC input. Internally biased to 1.2V common-mode voltage and can drive loads up to 5k || 5pF. Receive Positive In-Phase Baseband Output. Analog low-impedance differential buffer output. Connect output directly to baseband ADC input. Internally biased to 1.2V and can drive loads up to 5k || 5pF. Receive Level Detection Output. Digital CMOS output. Connect output directly to baseband IC input. Used to indicate RF input level. Logic high for input levels above -49dBm (typ). Logic low for levels below -54dBm (typ). Supply Voltage for Receiver Baseband Buffer. Bypass with capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. Receiver-On Control Input. Digital CMOS input. Connect to baseband IC mode control CMOS output. Supply Voltage for Receiver Downconverter. Bypass with capacitor as close to the pin as possible. Do not share the bypass capacitor ground vias with other branches. Transmitter-On Control Input. Digital CMOS input. Connect directly to baseband IC mode control CMOS output. Receive AGC Control. Analog high-impedance input. Connect directly to baseband IC DAC voltage output. See the Typical Operating Characteristics for Gain vs. VRX_AGC. DC and AC Ground Return for IC. Connect to PC board ground plane using multiple vias. 40 RX_BBQN 41 RX_BBIN 42 RX_BBIP 43 RX_DET 44 45 46 47 48 Exposed Paddle VCC_BUF RX_ON VCC_RMX TX_ON RX_AGC GND 14 ______________________________________________________________________________________ 2.4GHz 802.11b Zero-IF Transceivers MAX2820/MAX2821 CSB tCSO tCSS SCLK tDS tDH tCH tCL DIN BIT 1 tDV tDO DOUT BIT 1 BIT 2 BIT 6 BIT 7 BIT 8 BIT 14 BIT 15 BIT 2 BIT 6 BIT 7 BIT 8 BIT 14 BIT 15 BIT 16 tTR tCS1 tCSH tCSW BIT 16 Figure 1. MAX2820/MAX2821 Serial Interface Timing Diagram Table 1. Operating Mode Truth Table OPERATING MODE Shutdown Standby Receive Transmit MODE CONTROL INPUTS SHDNB 0 1 1 1 TX_ON X 0 0 1 RX_ON X 0 1 0 RX_PATH OFF OFF ON OFF CIRCUIT BLOCK STATES TX_PATH OFF OFF OFF ON PLL/VCO/LO GEN. OFF ON ON ON Operating Modes The MAX2820/MAX2821 have four primary modes of operation: shutdown, standby, receive active, and transmit active. The modes are controlled by the digital inputs SHDNB, TX_ON, and RX_ON. Table 1 shows the operating mode vs. the digital mode control input. values at any time. Refer to serial interface specification for details. Receive Mode Receive mode is enabled by driving the digital inputs SHDNB high, RX_ON high, and TX_ON low. In receive mode, all receive circuit blocks are powered on and all VCO, PLL, and autotuner circuits are powered on. None of the transmit path blocks are active in this mode. Although the receiver blocks turn on quickly, the DC offset nulling requires ~10s to settle. The receiver signal path is ready ~10s after a low-to-high transition on RX_ON. Shutdown Mode Shutdown mode is achieved by driving SHDNB low. In shutdown mode, all circuit blocks are powered down, except for the serial interface circuitry. While the device is in shutdown, the serial interface registers can still be loaded by applying VCC to the digital supply voltage (VCC_DIG). All previously programmed register values are preserved during the shutdown mode, as long as VCC_DIG is applied. Transmit Mode Transmit mode is achieved by driving the digital inputs SHDNB high, RX_ON low, and TX_ON high. In transmit mode, all transmit circuit blocks are powered on and all VCO, PLL, and autotuner circuits are powered on. None of the receive path blocks is active in this mode. Although the transmitter blocks turn on quickly, the baseband DC offset calibration requires ~2.2s to complete. In addition, the TX driver amplifier is ramped from the low-gain state (minimum RF output) to highgain state (peak RF output) over the next 1s to 2s. The transmit signal path is ready ~4s after a low-tohigh transition on TX_ON. Standby Mode Standby mode is achieved by driving SHDNB high, RX_ON, and TX_ON low. In standby mode, the PLL, VCO, LO generator, LO buffer, LO quadrature, and filter autotuner are powered on by default. The standby mode is intended to provide time for the slower-settling circuitry (PLL and autotuner) to turn on and settle to the correct frequency before making RX or TX active. The 3-wire serial interface is active and can load register ______________________________________________________________________________________ 15 2.4GHz 802.11b Zero-IF Transceivers MAX2820/MAX2821 Table 2. Programming Register Definition Summary (Address and Data) 4 ADDRESS BITS REGISTER NAME ENABLE SYNTH CHANNEL RECEIVE TRANSMIT A3 MSB 0 0 0 0 0 A2 15 0 0 0 1 1 A1 14 0 1 1 0 0 A0 13 1 0 1 0 1 D11 12 E11 X X 2C2 X D10 11 E10 X X 2C1 X D9 10 E9 X X 2C0 X D8 9 E8 X X 1C2 X D7 8 E7 PD X 1C1 X 12 DATA BITS D6 7 E6 ICP CF6 1C0 X D5 6 E5 R5 CF5 DL1 X D4 5 E4 R4 CF4 DL0 X D3 4 E3 R3 CF3 SF PA3 D2 3 E2 R2 CF2 BW2 PA2 D1 2 E1 R1 CF1 BW1 PA1 D0 LSB E0 R0 CF0 BW0 PA0 X = Don't care. Programmable Registers The MAX2820/MAX2821 contain programmable registers to control various modes of operation for the major circuit blocks. The registers can be programmed through the 3-wire SPI/QSPI/MICROWIRE-compatible serial port. The MAX2820/MAX2821 include five programmable registers: 1) Block-enable register 2) Synthesizer register 3) Channel frequency register 4) Receiver settings register 5) Transmitter settings register Each register consists of 16 bits. The four most significant bits (MSBs) are the register's address. The twelve least significant bits (LSBs) are used for register data. Table 2 summarizes the register configuration. A detailed description of each register is provided in Tables 3-6. Data is shifted in the MSB first. The data sent to the MAX2820/MAX2821, in 16-bit words, is framed by CSB. When CSB is low, the clock is active and data is shifted with the rising edge of the clock. When CSB transitions to high, the shift register is latched into the register selected by the contents of the address bits. Only the last 16 bits shifted into the MAX2820/MAX2821 are retained in the shift register. No check is made on the number of clock pulses. Figure 1 documents the serial interface timing for the MAX2820/MAX2821. register is described in Table 3. Note: Putting the IC in shutdown mode does not change the contents of the programming registers. Block-Enable Register The block-enable register permits individual control of the enable state for each major circuit block in the MAX2820/MAX2821. The actual enable condition of the circuit block is a logical function of the block-enable bit setting and other control input states. Table 4 documents the logical definition of state for each major circuit block. Synthesizer Register The synthesizer register (SYNTH) controls the reference frequency divider and charge-pump current of the PLL. See Table 5 for a description of the bit settings. Channel Frequency Register The channel frequency register (CHANNEL) sets the RF carrier frequency for the MAX2820/MAX2821. The channel is programmed as a number from 0 to 99. The actual frequency is 2400 + channel in MHz. The default setting is 37 for 2437MHz. See Table 6 for a description of the bit settings. Receiver Settings Register The receive settings register (RECEIVE) controls the receive filter -3dB corner frequency, RX level detector midpoint, and VGA DC offset nulling parameters. The defaults are intended to provide proper operation. However, the filter frequency and detector can be modified if desired. Do not reprogram VGA DC offset nulling parameters. These settings were optimized during development. See Table 7 for a description of the bit settings. Power-Up Default States The MAX2820/MAX2821 provide power-up loading of default states for each of the registers. The states are loaded on a VCC_DIG supply voltage transition from 0V to V CC. The default values are retained until reprogrammed through the serial interface or the power supply voltage is taken to 0V. The default state of each 16 Transmitter Settings Register The transmitter settings register (TRANSMIT) controls the 4-bit PA bias DAC. The 4 bits correspond to a PA bias current between 0 and full scale (~300A). See Table 8 for the bit settings. ______________________________________________________________________________________ 2.4GHz 802.11b Zero-IF Transceivers MAX2820/MAX2821 Table 3. Register Power-Up Default States REGISTER ENABLE ADDRESS 0001 DEFAULT 000000011110 FUNCTION Block-Enable Control Settings (E) Synthesizer Settings: * Reference frequency (R) * Charge-pump current (ICP) * PLL phase detector (PD) Channel frequency settings (CF) Receiver Settings: * VGA DC offset nulling parameter 1 (1C) * VGA DC offset nulling parameter 2 (2C) * -3dB lowpass filter bandwidth (BW) * Detector midpoint level (DL) * Special function bit (SF) Transmit Settings: * PA bias (PA) SYNTH 0010 000001000000 CHANNEL 0011 000000100101 RECEIVE 0100 111111010010 TRANSMIT 0101 000000000000 Table 4. Block-Enable Register (ENABLE) ADDRESS DATA BIT CONTENT DEFAULT D11 D10 D9 D8 D7 D6 0001 D5 D4 D3 D2 D1 D0 E(5) E(4) E(3) E(2) E(1) E(0) 0 1 1 1 1 0 E(11) E(10) E(9) E(8) E(7) E(6) 0 0 0 0 0 0 Reserved PA Bias-Control Enable (PAB_EN) * PAB_EN = SHDNB * (E(10) + TX_ON) Transmit Baseband Filters Enable (TXFLT_EN) * TXFLT_EN = SHDNB * (E(9) + TX_ON) TX Upconverter + VGA + Driver Amp Enable (TXUVD_EN) * TXUVD_EN = SHDNB * (E(8) + TX_ON) Receive Detector Enable (DET_EN) * DET_EN = SHDNB * (E(7) + RX_ON) RX Downconverter + Filters + AGC Amps Enable (RXDFA_EN) * RXDFA_EN = SHDNB * (E(6) + RX_ON) Receive LNA Enable (RXLNA_EN) * RXLNA_EN = SHDNB * (E(5) + RX_ON ) Autotuner Enable (AT_EN) * AT_EN = SHDNB * (E(4) + RX_ON + TX_ON) PLL Charge-Pump Enable (CP_EN) * CP_EN = SHDNB * E(3) PLL Enable (PLL_EN) * PLL_EN = SHDNB * E(2) VCO Enable (VCO_EN) * VCO_EN = SHDNB * E(1) Reserved DESCRIPTION AND LOGICAL DEFINITION ______________________________________________________________________________________ 17 2.4GHz 802.11b Zero-IF Transceivers MAX2820/MAX2821 Table 5. Synthesizer Register (SYNTH) ADDRESS DATA BIT D11:D8 D7 CONTENT X PD DEFAULT 0000 0 Reserved Phase-Detector Polarity Select * 0 = No phase inversion * 1 = Not permitted Charge-Pump Current Select * 0 = 1mA charge-pump current * 1 = 2mA charge-pump current Reference Frequency Divider * 000000 = 22MHz * 000001 = 44MHz DESCRIPTION 0010 D6 ICP 1 D5:D0 R(5:0) 000000 Table 6. Channel Frequency Block Register (CHANNEL) ADDRESS DATA BIT D11:D7 CONTENT X DEFAULT 00000 Reserved Channel Frequency Select: fLO = (2400 + CF(6:0))MHz * 0000000 = 2400MHz * 0000001 = 2401MHz * ............ * 1100010 = 2498MHz * 1100011 = 2499MHz DESCRIPTION 0011 D6:D0 CF(6:0) 0100101 Applications Information Receive Path LNA The MAX2820/MAX2821 RX_RF inputs are highimpedance RF differential inputs AC-coupled on-chip to the LNA. The LNA inputs require external impedance matching and differential to single-ended conversion. The balanced to single-ended conversion and interface to 50 is achieved through the use of an off-chip 2:1 balun transformer, such as the small surface-mount baluns offered by Murata and Toko. In the case of the 2:1 balun, the RX RF input must be impedancematched to a differential/balanced impedance of 100. A simple LC network is sufficient to impedance-match the LNA to the balun. The Typical Application Circuit shows the balun, inductors, and capacitors that constitute the matching network. Refer to the MAX2820/ MAX2821 EV kit schematic for component values of the matching network. The line lengths and parasitics have a noticeable impact on the matching element values in the board-level circuit. Some empirical adjustment of LC component values is likely. Balanced line layout on the differential input traces is essential to maintaining good IP2 performance and RF common-mode noise rejection. 18 The MAX2820/MAX2821 have two LNA gain modes that are digitally controlled by the logic signal applied to RF_GAIN. RF_GAIN high enables the high-gain mode, and RF_GAIN low enables the low-gain mode. The LNA gain step is nominally 30dB. In most applications, RF_GAIN is connected directly to a CMOS output of the baseband IC, and the baseband IC controls the state of the LNA gain based on the detected signal amplitude. Receiver Baseband Lowpass Filtering The MAX2820/MAX2821 on-chip receive lowpass filters provide the steep filtering necessary to attenuate the out-of-band (> 11MHz) interfering signals to sufficiently low levels to preserve receiver sensitivity. The filter frequency response is precisely controlled on-chip and does not require user adjustment. However, a provision is made to permit the -3dB corner frequency and entire response to be slightly shifted up or down in frequency. This is intended to offer some flexibility in trading off adjacent channel rejection vs. passband distortion. The filter -3dB frequency is programmed through the serial interface. The specific bit setting vs. -3dB frequency is shown in Table 7. The typical receive baseband filter gain vs. frequency profile is shown in the Typical Operating Characteristics. ______________________________________________________________________________________ 2.4GHz 802.11b Zero-IF Transceivers MAX2820/MAX2821 Table 7. Receive Settings Register (RECEIVE) ADDRESS DATA BIT D11:D9 D8:D6 CONTENT 2C(2:0) 1C(2:0) DEFAULT 111 111 DESCRIPTION VGA DC Offset Nulling Parameter 2 VGA DC Offset Nulling Parameter 1 RX Level Detector Midpoint Select * 11 = 01 = 50.2mVP * 10 = 70.9mVP * 00 = 35.5mVP Special Function Select (not presently used) * 0 = OFF * 1 = ON Receive Filter -3dB Frequency Select (frequencies are approximate) * 000 = 8.5MHz * 001 = 8.0MHz * 010 = 7.5MHz * 011 = 7.0MHz * 100 = 6.5MHz * 101 = 6.0MHz D5:D4 DL(1:0) 01 0100 D3 SF(0) 0 D2:D0 BW(2:0) 010 Table 8. Transmit Settings Register (TRANSMIT) ADDRESS DATA BIT D11:D4 0101 CONTENT X DEFAULT X Reserved PA Bias Select: * 1111 = Highest PA bias * ............ * 0000 = Lowest PA bias DESCRIPTION D3:D0 PA(3:0) 0000 Receive Gain Control and DC Offset Nulling The MAX2820/MAX2821 receive path gain is varied through an external voltage applied to the pin RX_AGC. Maximum gain is at VRX_AGC = 0V and minimum gain is at VRX_AGC = 2V. The RX_AGC input is a high-impedance analog input designed for direct connection to the RX_AGC DAC output of the baseband IC. The gaincontrol range, which is continuously variable, is typically 70dB. The gain-control characteristic is shown in the Typical Operating Characteristics section graph Receiver Voltage Gain vs. Gain-Control Voltage. Some local noise filtering through a simple RC network at the input is permissible. However, the time constant of this network should be kept sufficiently low in order not to limit the desired response time of the RX gaincontrol function. Receiver Baseband Amplifier Outputs The MAX2820/MAX2821 receiver baseband outputs (RX_BBIP, RX_BBIN, RX_BBQP, and RX_BBQN) are differential low-impedance buffer outputs. The outputs are designed to be directly connected (DC-coupled) to the in-phase (I) and quadrature-phase (Q) ADC inputs of the baseband IC. The RX I/Q outputs are internally biased to +1.2V common-mode voltage. The outputs are capable of driving loads up to 5k || 5pF with the full bandwidth baseband signals at a differential amplitude of 500mVP-P. Proper board layout is essential to maintain good balance between I/Q traces. This provides good quadrature phase accuracy. Receiver Power Detector The MAX2820/MAX2821 receiver level detector is a digital output from an internal threshold detector that is used to determine when to change the LNA gain state. In most applications, it is connected directly to a comparator input of the baseband IC. The threshold level can be programmed through the MAX2820/MAX2821 control software. ______________________________________________________________________________________ 19 2.4GHz 802.11b Zero-IF Transceivers MAX2820/MAX2821 Transmit Path Transmitter Baseband Inputs The MAX2820/MAX2821 transmitter baseband inputs (TX_BBIP, TX_BBIN, TX_BBQP, and TX_BBQN) are high-impedance differential analog inputs. The inputs are designed to be directly connected (DC-coupled) to the in-phase (I) and quadrature-phase (Q) DAC outputs of the baseband IC. The inputs must be externally biased to +1.2V common-mode voltage. Typically, the DAC outputs are current outputs with external resistor loads to ground. I and Q are nominally driven by a 400mVP-P differential baseband signal. Proper board layout is essential to maintain good balance between I/Q traces. This provides good quadrature phase accuracy by maintaining equal parasitic capacitance on the lines. In addition, it is important not to expose the TX I/Q circuit board traces going from the digital baseband IC to the MAX2820/MAX2821. The lines should be shielded on an inner layer to prevent coupling of RF to these TX I/Q inputs and possible envelope demodulation of the RF signal. Transmit Path Baseband Lowpass Filtering The MAX2820/MAX2821 on-chip transmit lowpass filters provide the filtering necessary to attenuate the unwanted higher-frequency spurious signal content that arises from the DAC clock feedthrough and sampling images. In addition, the filter provides additional attenuation of the second sidelobe of signal spectrum. The filter frequency response is set on-chip. No user adjustment or programming is required. The Typical Gain vs. Frequency profile is shown in the Typical Operating Characteristics. Transmitter DC Offset Calibration In a zero-IF system, in order to achieve low LO leakage at the RF output, the DC offset of the TX baseband signal path must be reduced to as near zero as possible. Given that the amplifier stages, baseband filters, and TX DAC possesses some finite DC offset that is too large for the required LO leakage specification, it is necessary to "null" the DC offset. The MAX2820/ MAX2821 accomplish this through an on-chip calibration sequence. During this sequence, the net TX baseband signal path offsets are sampled and cancelled in the baseband amplifiers. This calibration occurs in the first ~2.2s after TX_ON is taken high. During this time, it is essential that the TX DAC output is in the 0V differential state. The calibration corrects for any DAC offset. However, if the DAC is set to a value other than the 0V state, then an offset is erroneously sampled by the MAX2820/MAX2821 TX offset calibration. The TX DAC output must be put into the 0V differential state at or before the time TX_ON is taken high. 20 Power Amplifier Driver Output The MAX2820/MAX2821 TX_RF outputs are highimpedance RF differential outputs directly connected to the driver amplifier. The outputs are essentially opencollector outputs with an on-chip inductor choke connected to VCC_DRVR. The power amplifier driver outputs require external impedance matching and differential to single-ended conversion. The balanced to single-ended conversion and interface to 50 is achieved through the use of an off-chip 4:1 balun transformer, such as one from Murata or Toko. In this case, the TX RF output must be impedance-matched to a differential/balanced impedance of 200. The Typical Application Circuit shows the balun, inductors, and capacitors that constitute the matching network of the power amplifier driver outputs. The output match should be adjusted until the return loss at the balun output is > 10dB. Transmit Gain Control The transmit gain-control input provides a direct analog control over the transmit path gain. The transmit gain of the MAX2820/MAX2821 is controlled by an external voltage at pin TX_GC. The typical gain-control characteristic is provided in the Typical Operating Characteristics graph Transmitter Gain Control vs. Gain-Control Voltage. The input is a high-impedance analog input designed to directly connect to to the DAC output of the baseband IC. Some local noise filtering through a simple RC network at the input is permissible. However, the time constant of this network should be kept sufficiently low so the desired response time of the TX gain-control function is not limited. During the TX turn-on sequence, internally the gain is set at the minimum while the TX baseband offset calibration is taking place. The RF output is effectively "blanked" for the first 2.2s after TX_ON is taken high. After 2.2s, the "blanking" is released, and the gaincontrol amplifier ramps to the gain set by the external voltage applied to the TX_GC input. PA Bias DAC Output The MAX2820/MAX2821 provide a programmable analog current source output for use in biasing the RF power amplifier, such as the MAX2242. The output is essentially an open-drain output of a current source DAC. The output is designed to directly connect to the bias current pin on the power amplifier. The value of the current is determined by the 4 bits programmed into the internal register on the MAX2820/MAX2821. This programmability permits optimizing of the power amplifier idle current based on the output power level of the PA. Care must be taken in the layout of this line. Avoid running the line in parallel with the RF line. RF might couple ______________________________________________________________________________________ 2.4GHz 802.11b Zero-IF Transceivers onto the line, given the high impedance of the output. This might result in rectified RF, altering the value of the bias current and causing erratic PA operation. Loop Filter The PLL uses a classical charge pump into an external loop filter (C-RC) in which the filter output connects to the voltage tuning input of the VCO. This simple thirdorder lowpass loop filter closes the loop around the synthesizer. The Typical Application Circuit shows the loop filter elements around the MAX2820/MAX2821.The capacitor and resistor values are set to provide the loop bandwidth required to achieve the desired lock time while also maintaining loop stability. Refer to the MAX2820/MAX2821 EV kit schematic for component values. A 45kHz loop bandwidth is recommended to ensure that the loop settles quickly enough to achieve 5s TX turnaround time and 10s RX turnaround time. This is the loop filter on the EV kit. Narrowing the loop bandwidth increases the settling time and results in unacceptable TX-RX turnaround time performance. MAX2820/MAX2821 Synthesizer Channel Frequency and Reference Frequency The synthesizer/PLL channel frequency and reference settings establish the divider/counter settings in the integer-N synthesizer of the MAX2820/MAX2821. Both the channel frequency and reference oscillator frequency are programmable through the serial interface. The channel frequency is programmed as a channel number 0 to 99 to set the carrier frequency to 2400MHz to 2499MHz (LO frequency = channel + 2400). The reference frequency is programmable to 22MHz or 44MHz. These settings are intended to cover only the required 802.11b channel spacing and the two possible crystal oscillator options used in the radios. Reference Oscillator Input The reference oscillator inputs ROSCP and ROSCN are high-impedance analog inputs. They are designed to be connected to the reference oscillator output through a coupling capacitor. The input amplitude can range from 200mVP-P to 500mVP-P; therefore, in the case of a reference oscillator with a CMOS output, the signal must be attenuated before being applied to the ROSC inputs. The signal can be attenuated with a resistor- or capacitor-divider network. Reference Voltage Output A voltage reference output is provided from pin 2, VREF, for use with certain baseband ICs. The nominal output voltage is 1.2V. The reference voltage is firstorder compensated over temperature to provide a reasonably low drift output, 1.1V to 1.3V over temperature, under load conditions. The output stage is designed to drive 2mA loads with up to 20pF of load capacitance. The VREF output is designed to directly connect to the baseband reference input. Chip Information TRANSISTOR COUNT: 13,607 ______________________________________________________________________________________ 21 2.4GHz 802.11b Zero-IF Transceivers MAX2820/MAX2821 Typical Application Circuit DIGITAL MODE CONTROL SIGNALS FROM/TO BASEBAND IC RX ANALOG OUTPUT SIGNAL DIGITAL MODE CONTROL SIGNALS TO/FROM BASEBAND IC TO BASEBAND IC DAC OUTPUT FROM BASEBAND IC VCC_RMX VCC_BUF RX_BBQN RX_BBQP RX_DET RX_BBIN RX_BBIP RX_AGC RX_ON TX_ON RX_1K 38 48 VCC_LNA OPTIONAL CONNECTION TO BASEBAND VREF (MAX2821 ONLY) RX GAIN-CONTROL SIGNALS TO/FROM BASEBAND IC 1 2 RF_GAIN RX_RFN 3 4 5 6 47 46 45 44 43 42 41 40 39 DOUT 37 36 SHDNB VCC_RXF VCC_LO VCC_VCO BYP TUNE GND_VCO GND_CP CP_OUT LOOP FILTER VCC_CP CSB SCLK PROGRAMMING AND MODE CONTROL RX LEVEL DETECTOR 35 34 33 32 31 RX RF INPUT FROM SWITCH AND BPF RX_RFP VCC_REF RBIAS TX_RFP 90 7 8 9 10 11 TX_GC DAC OUTPUT FROM BASEBAND IC 12 13 14 15 16 17 0 30 MAX2820/ MAX2821 90 0 INTEGER-N SYNTHESIZER 29 28 27 TX RF OUTPUT TO SWITCH AND BPF TX_RFN PA_BIAS VCC_DRVR TO PA BIAS INPUT VOS COMP SERIAL INTERFACE 26 25 SERIAL INTERFACE TO BASEBAND IC 18 19 20 21 22 23 24 VCC_TMX TX_BBIN TX_BBIP TX_BBQP TX_BBQN VCC_TXF GND_DIG N.C. VCC_DIG ROSCP REFERENCE OSCILLATOR INPUT TX ANALOG INPUT SIGNAL FROM BASEBAND IC 22 ______________________________________________________________________________________ ROSCN DIN 2.4GHz 802.11b Zero-IF Transceivers Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) 32, 44, 48L QFN.EPS MAX2820/MAX2821 PACKAGE OUTLINE 32,44,48L QFN, 7x7x0.90 MM 21-0092 H 1 2 U PACKAGE OUTLINE, 32,44,48L QFN, 7x7x0.90 MM 21-0092 H 2 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 23 (c) 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. |
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