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| CXA3067M Wide Band FSK Receiver Description The CXA3067M is an integrated circuit designed for CATV wide band FSK receiver. This monolithic IC is composed of local oscillator, double balanced mixer, limiter, FM detector, data shaper and PLL circuit in a single chip. Features * Built in PLL * 3 bits 3 states frequency selection * Applied for 4 reference frequency * * * * (7.15625/7.15909/14.3125/14.31818 MHz) Compatible with external reference clock and X'tal oscillator Balanced oscillator and double balanced mixer for low L.O. leakage Low power consumption SOP 30 pin package 30 pin SOP (Plastic) Absolute Maximum Ratings (Ta=25 C) * Supply voltage VCC -0.3 to +5.5 * Storage temperature Tstg -55 to +150 Operating Conditions * Supply voltage * Operating temperature V C VCC Topr 4.75 to 5.3 -25 to +75 V C Function * Oscillator * Mixer * PLL * Limiter * FSK detector * Data shaper Applications FSK receiver for CATV Structure Bipolar silicon monolithic IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. --1-- E97657A89-TE CXA3067M Pin configuration and Block diagram REFSW RFVCC RFGND FSET3 FSET2 IFGND IFVCC 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 V.REG DATA SHAPER FREQ SELECT MAIN DIVIDER PHASE DET REF DIVIDER CHARGE PUMP SCALER OSC LIM MIX DET REF OSC 1 REFIN 2 XTAL 3 FSET1 4 RDSW 5 CPLF 6 VT 7 OSC1 8 OSC2 9 DGND 10 11 12 13 14 15 LIMIN DVCC GND BYP --2-- MIXOUT LIMOUT DETIN RFEM NOUT MIXIN RFIN POUT LF2 LF1 CXA3067M Pin Description and Equivalent Circuit Pin No. Symbol Typical voltage (V) Equivalent circuit Description 1 REFIN 3.4 500 DVCC 11 External clock input and X'tal connection for reference oscillator. 1 2 2 XTAL 4.0 9 DGND X'tal connection for reference oscillator. 11 DVCC 20k 3 FSET1 2.5 (OPEN) 3 20k 9 DGND The pin for channel selection. The condition of pin 3 has 3 states. Connect to 5 V source for "Hi" selection and connect to GND for "Low" selection and leave open. 11 DVCC 20k 4 RDSW 3.0 (OPEN) 4 25k 30k 9 DGND Reference frequency selection. Connect to GND when reference frequency is 14.3125 MHz or 14.31818 MHz and leave open when reference frequency is 7.15625 MHz or 7.15909 MHz. 11 DVCC 10k 100 5 CPLF 2.0 Charge pump output. Connect to loop filter. 5 6 100 6 VT 0.3 to VCC 9 DGND Connect to loop filter. OSC tuning voltage output. --3-- CXA3067M Pin No. Symbol Typical voltage (V) 7 Equivalent circuit Description 8 26 RFVCC 700 700 7 OSC1 3.7 3k 3k Oscillator. 8 OSC2 3.7 23 RFGND 9 DGND 0 PLL circuit GND. 26 RFVCC 330 330 10 10 MIXOUT 4.0 Mixer output. Output impedance is 330 . 23 RFGND 11 DVCC 5 PLL circuit power supply. 21 12 LIMIN 2.4 12 330 13 10k 10k IFVCC Limiter input. Input impedance is 330 . 13 BYP 2.4 22 IFGND 14 GND 0 21 IFVCC GND. 15 LIMOUT 3.1 15 Limiter output. 22 IFGND --4-- CXA3067M Pin No. Symbol Typical voltage (V) Equivalent circuit 21 IFVCC 32k 16 Description 16 DETIN 5.0 Detector input. Connect to a discriminator. 22 IFGND 21 IFVCC 12p 12p 18 17 LP1 4.2 17 The capacitor is connected between pins 17 and 18 for the filter. 22 18 LP2 4.2 IFGND 4.1 (Hi) 19 POUT 0.22 (Low) 21 IFVCC 50 19 22 IFGND FSK data output. 4.1 (Hi) 20 NOUT 0.22 (Low) 21 IFVCC 50 20 Pins 19 and 20 are each other reversal condition. 22 IFGND 21 22 23 IFVCC IFGND RFGND 5.0 0 0 Power supply for limiter, detector, data shaper circuit. GND for limiter, detector, data shaper circuit. GND for RFamp, Mixer, oscillator circuit. --5-- CXA3067M Pin No. Symbol Typical voltage (V) Equivalent circuit Description 24 RFIN 1.9 26 RFVCC 27 24 MIX 5k 233 23 25 RFamp input. 25 RFEM 1.1 Gain adjustment. Normally, by-pass capacitor is connected at pin 25 to GND. 27 MIXIN 5.0 RFGND RFamp output and mixer input. 26 RFVCC 5.0 11 DVCC 28 REFSW 0.7 (OPEN) 28 9 DGND Power supply for RFamp, mixer, oscillator circuit. Reference frequency selection. Decoupling capacitor is connected at pin 28 to GND when reference frequency is 7.15909 MHz or 14.31818 MHz and pin 28 is connected to GND directly when reference frequency is 7.15625 MHz or 14.3125 MHz. The pin of channel selection. The condition of pin 29 has 3 states. Connect to 5 V source for "Hi" selection and connect to GND for "Low" selection and leave open. 11 DVCC 20k 29 FSET3 2.5 (OPEN) 29 20k 9 DGND 11 DVCC 20k 30 FSET2 2.5 (OPEN) 30 20k 9 DGND The pin of channel selection. The condition of pin 30 has 3 states. Connect to 5 V source for "Hi" selection and connect to GND for "Low" selection and leave open. --6-- CXA3067M Electrical Characteristics See Electrical Characteristics Test Circuit (VCC=5.0 V, Ta=+25 C) Item RFVCC Current consumption IFVCC Current consumption DVCC Current consumption Input sensitivity 1 Symbol RFICC IFICC DICC Pin No. 26, 27 21 11 Circuit No. 1 1 1 RFVCC V1=5 V IFVCC V2=5 V DVCC V4=1 V V3=5 V fMOD=10 kHz, fDEV=75 kHz Jitter is 1 % for fMOD 50 Termination RF=53.35 M to 169.5 MHz fMOD=10 kHz, fDEV=75 kHz Jitter is 1 % for fMOD 50 Termination RF=221.95 M to 302 MHz fMOD=10 kHz, fDEV=75 kHz Jitter is 1 % for fMOD 50 Termination RF=53.35 M to 302 MHz Measurement on RFIN pin SW1 : ON RF=53.35 M to 169.5 MHz Measurement on RFIN pin LOleak2 24 2 SW1 : ON RF=221.95 M to 302 MHz Irf Grf1 Grf2 Grf3 r (rf) C (rf) r (mix) C (mix) Gmix NF rfmix 27 2427 2427 2427 24 24 27 27 2710 2410 4 5 1 3 3 3 RFVCC V1=5 V RF=53.35 M to 169.5 MHz RF=221.95 M to 229.8 MHz RF=302 MHz I=4.8 mA, RF=100 MHz Load Resistance=510 l=4.8 mA, RF=100 MHz Load Resistance=510 RF=100 MHz RF=100 MHz RF=108.5 MHz IF=10.7 MHz RF=108.5 MHz IF=10.7 MHz 1 9 3 24 22 16 4.8 30 25 19 670 4.7 1.7 5.7 13 7 17 7 34 28 22 mA dB dB dB pF k pF dB dB +5 dBmV Conditions Min. 14 3 3.5 Typ. 24 6.7 7 Max. 34 10 10 Unit mA mA mA Vi1 2 -32 dBmV Input sensitivity 2 Vi2 2 -25 dBmV Input level Vil 2 +10 dBmV Local OSC leakage from RF input 1 Local OSC leakage from RF input 2 RFamp bias current RFamp voltage gain 1 RFamp voltage gain 2 RFamp voltage gain 3 RFamp input resistance RFamp input capacitance Mixer input resistance Mixer input capacitance Mixer voltage gain RFamp+Mixer noise figure Note) LOleak1 24 2 -10 dBmV 0 dBmV=1 mV, 0 dBV=1 V 0 dBmV=60 dBV 0 dBm=47 dBmV 1) Noise figure is uncorrected for image. --7-- CXA3067M Item Mixer output resistance Limiter input resistance Limiter voltage gain FSK Data output voltage "H" FSK Data output voltage "L" Symbol rL (mix) r (lim) Glim Pin No. 10 12 15 Circuit No. Conditions IF=10.7 MHz IF=10.7 MHz Min. 222 222 Typ. 332 332 70 Max. 442 442 Unit dB 6 IF=10.7 MHz Load Capacitance=2 pF OUTH 19, 20 2 Load Resistance=10 k, fMOD=10 kHz, fDEV=75 kHz Load Capacitance=2 pF 3.8 4.1 V OUTL 19, 20 2 Load Resistance=10 k, fMOD=10 kHz, fDEV=75 kHz Load Capacitance=2 pF 0.22 0.6 V FSK Data output rise time Tr 19, 20 2 Load Resistance=10 k, fMOD=10 kHz, fDEV=75 kHz Road Capacitance=2 pF 12 30 nsec FSK Data output fall time Tf 19, 20 2 Road Resistance=10 k, fMOD=10 kHz, fDEV=75 kHz 12 30 nsec Oscillation frequency VT output voltage range OSC VT 7, 8 6 Source current SW2 : OFF 40 0.3 2.5 315 VCC MHz V Charge pump current Icp 5 7 SW3 : OFF Sink current SW2 : ON SW3 : ON 25 50 75 A REFCLOCK input level 1 REFCLOCK input level 2 REFOSC loop gain FSET1/2/3 "Hi" level input voltage FSET1/2/3 "Low" level input voltage FSET1/2/3 "Hi" level input current FSET1/2/3 "Low" level input current RDSW "Low" level input voltage RDSW "Low" level input current REFSW "Low" level input voltage CLK 1 CLK 2 Gref 1 1 1, 2 3 1 1 1 1 1 1 1 Sin wave input Square wave input Vin2=14 MHz 0.3 0.3 0.4 0.4 30 3.0 3.0 Vp-p Vp-p dB FSETVH 3, 29, 30 FSETVL 3, 29, 30 FSETIH FSETIL RDVL RDIL REFVL 3, 29, 30 3, 29, 30 4 4 28 3.8 0 FSET "Hi"=V5=5 V FSET "Low"=V5=0 V 120 -380 0 RDSW "L"=V6=0 V -122 0 -83 250 -250 VCC 0.4 380 -120 0.4 -43 0.4 V V A A V A V --8-- CXA3067M Electrical Characteristics Test Circuit V1 5V V2 5V A V5 A A 30 29 28 A 27 26 25 24 23 22 21 20 19 18 17 16 REFSW IFGND FSET2 IFVCC RFGND RFVCC FSET3 MIXOUT FSET1 REFIN RDSW DGND DVCC OSC1 XTAL CPLF OSC2 LIMIN 1 2 3 4 A V6 5 V4 1V 6 7 8 9 10 11 12 13 14 GND BYP VT 15 A V3 5V Measurement : Current consumption Measurement circuit 1 Spectrum analyzer Passive probe 10.8P 10M Oscilloscope 10 : 1 5V Vin 4.7 10n SW1 NEG POS 10n 1n 10n 51 10k 10k 2p 680p 17 16 330 LIMOUT DETIN RFEM POUT MIXIN RFIN LF2 NOUT LF1 10n 30 29 28 27 26 25 24 23 22 21 2p 20 SELECTION 19 18 REFSW IFGND RFEM FSET2 IFVCC MIXIN RFIN LF2 RFGND RFVCC FSET3 NOUT LF1 GND MIXOUT LIMIN LIMOUT FSET1 REFIN RDSW DGND XTAL CPLF OSC2 DVCC OSC1 BYP VT DETIN POUT 5.6 1 10n 10n 2 3 4 5 6 51p 7 51p 8 9 10 11 12 13 14 15 SELECTION 10n 10n 56p 51 51k 51k fref 1T362 Measurement : Input sensitivity, local osc leakage, FSK DATA output voltage, Measurement circuit 2 --9-- rise time, fall time CXA3067M 5V 10n Vin1 51 GV=Vout1/Vin1 (RFamp voltage gain) GV=Vout2/Vin2 (REFOSC loop gain) 4.7 Vout1 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 FSET3 10n 1n REFSW IFGND FSET2 IFVCC RFGND RFVCC MIXOUT FSET1 REFIN RDSW DGND DVCC OSC1 CPLF OSC2 LIMIN 1 10n 2 3 4 5 6 7 8 9 10 11 12 13 14 GND BYP VT 15 LIMOUT 10n XTAL 51 Vin2 5V Vout2 Measurement : RFamp voltage gain : REFOSC loop gain Measurement circuit 3 Wire L1 L2 0.5 0.5 Coil 3 3.8 Number of 1.5 T 6.5 T 510 4.7 diameter diameter windings 10n 5V GV=Vout2/Vout1 Vin 10n 51 120p 10n 1n DETIN RFEM POUT MIXIN RFIN LF2 NOUT LF1 Vout1 30 29 28 L1 10n 24 23 22 21 20 19 18 17 16 27 26 25 RFGND RFVCC FSET3 NOUT LF1 14 REFSW IFGND FSET2 MIXOUT IFVCC FSET1 REFIN RDSW DGND OSC1 LIMIN 1 10n 10n 2 3 4 5 6 51p 7 51p 8 9 10 11 12 13 BYP VT 15 100p 10n 51 51k 1T362 3.3n fref 27k 30n 51k Vout2 330 L2 Measurement : Mixer voltage gain Measurement circuit 4 --10-- 10n LIMOUT XTAL CPLF OSC2 DVCC GND DETIN RFEM POUT MIXIN RFIN LF2 CXA3067M Wire L1 L2 0.5 0.5 Coil 3 3.8 Number of windings 1.5 T 6.5 T 5V Noise Figure meter diameter diameter 4.7 Noise Source 10n 510 L1 120p 10n 1n 10n 51 10n 24 23 22 21 20 19 18 17 16 30 29 28 27 26 25 RFGND RFVCC FSET3 NOUT LF1 14 REFSW IFGND FSET2 MIXOUT IFVCC FSET1 REFIN RDSW DGND OSC1 LIMIN 1 10n 10n 2 3 4 5 6 51p 7 51p 8 9 10 11 12 13 BYP VT 15 10n 100p 10n 110p 51 51k 3.3n fref 27k 30n 51k 1T362 10n L2 40p 2.2 Measurement : RFamp +Mixer NF Measurement circuit 5 5V 10n 4.7 GV=Vout/Vin 10n 10n LIMOUT XTAL CPLF OSC2 DVCC GND DETIN RFEM POUT MIXIN RFIN LF2 10n 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 330 RFGND RFVCC FSET3 NOUT LF1 14 REFSW IFGND FSET2 MIXOUT IFVCC FSET1 REFIN RDSW DGND OSC1 LIMIN 1 2 3 4 5 6 7 8 9 10 11 12 13 BYP VT 15 10n 10n 10n Vout 51 Vin Measurement : Limiter voltage gain Measurement circuit 6 --11-- LIMOUT XTAL CPLF OSC2 DVCC GND DETIN RFEM POUT MIXIN RFIN LF2 CXA3067M Wire L2 0.5 Coil 3.8 Number of windings 6.5 T 4.7 V1 5V diameter diameter 10n 30 29 28 27 26 1n 25 24 23 22 10n 21 20 19 18 17 16 FSET2 IFVCC MIXIN RFIN LF2 RFGND RFVCC FSET3 NOUT LF1 14 REFSW IFGND MIXOUT FSET1 DGND LIMIN VT 1 SW2 2 10n 3 4 5 6 51p 7 51p 8 9 10 11 12 13 15 100P V4 4V 10n 51 fref 14MHz 51k V5 2.5V V6 0V L2 SW3 V7 10V 1T362 51k A Measurement : Charge pump current Measurement circuit 7 --12-- 10n LIMOUT REFIN RDSW XTAL CPLF OSC2 DVCC OSC1 GND BYP DETIN RFEM POUT CXA3067M Function Explanation The CXA3067M is an integrated circuit designed for CATV wide band FSK receiver. This monolithic IC is composed of local oscillator, double balanced mixer, limiter, FM detector, data shaper and PLL circuit in a single chip. The function of each other section is described below. 1. RFamp circuit This circuit amplifies RF signal, and RF signal is input to pin 24 (RFIN). Since pin 27 is an open collector, connect power supply through a coil which composes tune circuit or a choke coil or a resistor. RF signal is selected a desired frequency by this tune circuit. The desired frequency is input to mixer circuit through coupling capacitor. 2. Mixer circuit This is a double-balanced mixer having small leakage of local signal. The RF signal is converted to IF signal by the signal supplied from oscillator. The output impedance is approximately 330 . Normally, connect a ceramic filter to 10 pin (MIXOUT). 3. Local oscillator circuit The balanced oscillator circuit with pins 7 and 8 (OSC1, OSC2). Connect an LC resonance circuit comprising a varicap diode to pins 7 and 8. 4. PLL circuit The PLL circuit fixes the local oscillator frequency to desired frequency. It consists of the main divider, reference divider, phase comparator, charge pump, reference oscillator. As stated in the accompanying document, desired frequency (channel) can be selected through the combination of the conditions of pins 1, 29 and 30 (FSET 1; 2; 3). As stated in the accompanying document, reference frequency can be selected through the combination the conditions of pin 3 (RDSW) and pin 28 (REFSW). 5. Limiter circuit This circuit amplifies the mixer IF output through ceramic filter. For quadrature FM detection, this circuit amplifies IF signal by necessary level. The input impedance is approximately 330 . 6. Detector circuit For quadrature FM detection, the phase of limiter output (pin 15) is shifted 90 by discriminator as the output is input to pin 16. 7. Data shaper This circuit output performs the waveform shaping of the demodulated FSK signal and outputs the resulting signal as a rectangular wave. --13-- CXA3067M Description of PLL Block 1. The followings "channel No." can be selected through the combination of the conditions of pins 1, 29 and 30 (FSET 1; 2; 3). FSET conditions have 3 states (OPEN, Hi, Low). Channel Selection Channel No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Local OSC frequency [MHz] 42.65 83.70 98.20 100.00 108.20 117.20 117.80 119.20 133.40 139.20 168.70 180.20 211.25 219.10 312.70 Receiving frequency [MHz] 53.55 73.00 87.50 89.30 97.50 106.50 128.50 108.50 122.70 128.50 158.00 169.50 221.95 229.80 302.00 FSET 1 OPEN L H OPEN L H OPEN L H OPEN L H OPEN L H FSET 2 OPEN OPEN OPEN L L L H H H OPEN OPEN OPEN L L L FSET 3 OPEN OPEN OPEN OPEN OPEN OPEN OPEN OPEN OPEN L L L L L L Note) OPEN : No connect L : Connect to GND H : Connect to VCC --14-- CXA3067M 2. The followings Reference frequency can be selected through the combination the conditions of pin 3 (RDSW) and pin 28 (REFSW). When the pin 28 is connected to GND directly, the pin 28 is state of DCGND. When the pin 28 is connected to GND through decoupling capacitor, the pin 28 is state of ACGND. Reference Frequency selection f (ref) 7.15625 MHz 7.15909 MHz 14.3125 MHz 14.31818 MHz RDSW OPEN OPEN GND GND REFSW DCGND ACGND DCGND ACGND 1 2 1 2 Note 1) Connect to GND directly. 30 29 28 REFSW 27 Note 2) Connect to GND through decoupling capacitor 30 29 28 REFSW 27 --15-- CXA3067M 3. The comparison frequency is 25.021853 kHz at reference frequency 7.15625 MHz/14.3125 MHz, and 25.031783 kHz at reference frequency 7.15909 MHz/14.31818 MHz. The frequency division ratio of the reference divider is 286. The frequency division ratio of the scaler is 1 or 2; When the reference frequency is 7.15625 MHz/7.15909 MHz, the frequency division ratio of the scaler is 1. When the reference frequency is 14.3125 MHz/14.31818 MHz, the frequency division ratio of the scaler is 2. Reference frequency=7.15625 MHz The comparison frequency=7.15625/286=25.021853 kHz Ch 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 fOSC [MHz] 42.65 83.7 98.2 100 108.2 117.2 117.8 119.2 133.4 139.2 168.7 180.2 211.25 219.1 312.7 Divider 1705 3345 3925 3997 4324 4684 4708 4764 5331 5563 6742 7202 8443 8756 12497 8192 4096 2048 1024 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 1 0 1 1 1 0 0 0 0 0 0 1 1 0 0 0 1 1 1 1 0 0 0 0 1 1 0 1 0 0 0 512 1 0 1 1 0 1 1 1 0 0 1 0 0 1 0 256 0 1 1 1 0 0 0 0 0 1 0 0 0 0 0 128 1 0 0 1 1 0 0 1 1 1 0 0 1 0 1 64 0 0 1 0 1 1 1 0 1 0 1 0 1 0 1 32 1 0 0 0 1 0 1 0 0 1 0 1 1 1 0 16 0 1 1 1 0 0 0 1 1 1 1 0 1 1 1 8 1 0 0 1 0 1 0 1 0 1 0 0 1 0 0 4 0 0 1 1 1 1 1 1 0 0 1 0 0 1 0 2 0 0 0 0 0 0 0 0 1 1 1 1 1 0 0 1 1 1 1 1 0 0 0 0 1 1 0 0 1 0 1 Reference frequency=7.15909 MHz The comparison frequency=7.15909/286=25.031783 kHz Ch 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 fOSC [MHz] 42.65 83.7 98.2 100 108.2 117.2 117.8 119.2 133.4 139.2 168.7 180.2 211.25 219.1 312.7 Divider 1704 3344 3923 3995 4323 4682 4706 4762 5329 5561 6739 7199 8439 8753 12492 8192 4096 2048 1024 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 1 0 1 1 1 0 0 0 0 0 0 1 1 0 0 0 1 1 1 1 0 0 0 0 1 1 0 1 0 0 0 512 1 0 1 1 0 1 1 1 0 0 1 0 0 1 0 256 0 1 1 1 0 0 0 0 0 1 0 0 0 0 0 128 1 0 0 1 1 0 0 1 1 1 0 0 1 0 1 64 0 0 1 0 1 1 1 0 1 0 1 0 1 0 1 32 1 0 0 0 1 0 1 0 0 1 0 0 1 1 0 16 0 1 1 1 0 0 0 1 1 1 1 1 1 1 0 8 1 0 0 1 0 1 0 1 0 1 0 1 0 0 1 4 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 2 0 0 1 1 1 1 1 1 0 0 1 1 1 0 0 1 0 0 1 1 1 0 0 0 1 1 1 1 1 1 0 --16-- CXA3067M Notes on Application Take care of the followings because the CXA3067M has limiter voltage gain of approximately 67 dB and uses high frequency. 1) Separate the input pattern from the output pattern as far as possible and makes wiring short. 2) Ground the decoupling capacitor as close to pin 13 as possible. Take care of the followings in order to reduce the jitter. 1) Insert the capacitor as close to pin 17 and 18 as possible. 2) Ground the by-pass capacitor as close to IFVCC to supply pin 16 as possible. Take care of the following, for the purpose of the isolation of local oscillator resonance circuit and X'tal (RFF CLOCK). 1) Separate the patterns connected pin 1 and pin 2 from the local oscillator resonance circuit. Take care of the following, in order to reduce the phase noise. 1) Connect the loop filter as close to pins 5 and 6 as possible. Take care of the following, in order to prevent the parasitic oscillation. 1) Connect the local oscillator resonance circuit as close to pins 7 and 8 as possible. And compact the local oscillator resonance circuit. The tuning voltage at the local oscillator resonance circuit. The output voltage at pin 6 is 0.3 V to VCC. When the oscillation frequency is the desired frequency, please the output voltage at pin 6 should be been 2.5 V. Please decide the component value of loop filter by each system. 11 DVCC 10k 100 5 100 6 9 DGND --17-- Application VCC (+5V) fref RDSW REFSW 7.15625 MHz OPEN DCGND 14.3125 MHz GND DCGND 10n 14.31818 MHz GND ACGND 4.7 7.15909 MHz OPEN ACGND RF INPUT FSK DATA OUT FSK DATA OUT 51 10n TUNE CIRCUIT OF RFAMP NEG POS 2p 10k 680p 10n 330 18 19 1n SELECTION 28 27 26 25 24 23 22 21 20 17 16 30 29 10n 2p 10k MIXIN RFIN RFEM NOUT POUT LF2 LF1 FSET2 FSET3 RFVCC REFSW RFGND IFGND IFVCC DETIN FIXED DISCRIMINATOR 10.7MHz REFIN RDSW FSET1 VT DGND LIMIN XTAL CPLF OSC2 DVCC OSC1 1 10 MIXOUT 2 51p 51p 3 4 5 6 7 8 9 11 12 13 BYP 14 GND 15 10n SELECTION 10n LIMOUT 10n 10n 51k 1T362 15p 15p 51 --18-- CXA3067M 51k LOCAL OSCILLATOR LOOP FILTER 10.7MHz CERAFIL 5.6 56p 14MHz X'tal REF CLOCK INPUT Please refer to another sheets with following circuits. 1) Tuned circuit of RFamp 2) Local osc resonance circuit 3) Loop filter CXA3067M Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. CXA3067M The component value of the tune circuit, local oscillator resonance circuit and loop filter. Channel No. Wire diameter Tune circuit of RFamp Local oscillator resonance circuit 7 8 1T362 1n 51p 0.5 20.5T 5 Loop filter 3.3n 1 Number of windings Coil diameter 0.5 2.5T 3 51p 330p 510 39n 24k 82p 3.3n 2 0.5 2.5T 3 180p 510 0.5 11.5T 3.8 30n 27k 100p 3.3n 3 0.5 2.5T 3 120p 510 0.5 8.5T 3.8 30n 27k 100p 3.3n 4 0.5 2.5T 3 120p 510 0.5 8.5T 3.8 30n 27k 100p 3.3n 5 0.5 2.5T 3 82p 510 0.5 8.5T 3.8 30n 27k 100p 3.3n 6 0.5 1.5T 3 150p 510 0.5 6.5T 3.8 30n 27k 100p 3.3n 7 0.5 1.5T 3 100p 510 0.5 6.5T 3.8 30n 27k 100p 3.3n 8 0.5 1.5T 3 120p 510 0.5 6.5T 3.8 30n 27k --19-- CXA3067M Channel No. Tune circuit of RFamp Local oscillator resonance circuit 100p Loop filter 3.3n 9 0.5 1.5T 3 100p 510 0.5 5.5T 3.8 30n 27k 100p 3.3n 10 0.5 1.5T 3 100p 510 0.5 5.5T 3.8 30n 27k 100p 3.3n 11 0.5 1.5T 3 62p 510 0.5 3.5T 3.8 30n 27k 62p 3.3n 12 0.5 1.5T 3 56p 510 0.5 3.5T 3.8 30n 30k --20-- CXA3067M Supply voltage vs. Current consumtion 30 RF BLOCK 32 30 28 26 24 22 20 IF BLOCK 0 4.6 18 10 4.7 4.8 4.9 5 5.1 Supply voltage (V) 5.2 5.3 5.4 Frequency response RF amp voltage gain 25 Current consumption (mA) 20 15 10 PLL BLOCK 5 RFamp gain (dB) 100 Reception Frequency (MHz) 300 Frequency response limiter voltage gain 90 80 70 -50 -55 Local oscillation leakage at RFIN pin Leakage level (dBm) Limiter gain (dB) -60 -65 -70 -75 -80 60 50 40 30 20 1 10 Intermediate Frequency (MHz) 100 1 100 Local oscillation frequency (MHz) 1000 S curve response 4.32 4.31 LP1 Output Level (V) 4.3 4.29 4.28 4.27 4.26 10.6 10.65 10.7 10.75 Intermediate Frequency (MHz) 10.8 --21-- CXA3067M RFIN Input Impedance (Resistance, Capacitance) Reception frequency 50 MHz 100 MHz 200 MHz Resistance 890 670 510 j50 Capacitance 5.2 pF 4.7 pF 4.4 pF j25 j100 0 50MHz 100MHz 200MHz -j100 -j25 -j50 SMA Connector PCB S11 Calibration plane VCC 5V 27 1nF 510 26 25 1nF 1nF 24 IC CXA3067M --22-- CXA3067M MIXIN Input Impedance (Resistance, Capacitance) Reception frequency 50 MHz 100 MHz 200 MHz Resistance 2.1 k 1.7 k 900 j50 Capacitance 5.7 pF 5.7 pF 6.1 pF j25 j100 0 50MHz 100MHz 200MHz -j100 -j25 -j50 SMA Connector PCB 11k 60V 27 RFVCC IC CXA3067M 1nF VCC 26 S11 Calibration plane 25 24 --23-- CXA3067M Package Outline Unit : mm 30PIN SOP(PLASTIC) + 0.4 2.3 - 0.15 0.1 16 + 0.4 18.8 - 0.1 30 10.3 0.4 + 0.3 7.6 - 0.1 + 0.2 0.1 - 0.05 (9.3) 15 1 0.45 0.1 1.27 0.2 M + 0.1 0.2 - 0.05 0 to 10 DETAIL A PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE SOP-30P-L03 SOP030-P-0375 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER PLATING COPPER ALLOY 0.7g --24-- 0.5 0.2 A |
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