1 p x f s . 0 4 ' & 5 870 11 ( f o f s b m % f t d s j q u j p o ' f b u v s f t " q q m j d b u j p o t 1 j o $ p o g j h v s b u j p o 1 j o " t t j h o n f o u & r v j w b m f o u $ j s d v j u " c t p m v u f . b y j n v n 3 b u j o h t the xp162a01b5pr is a p-channel power mos fet with low on-state resistance and ultra high-speed switching characteristics. because high-speed switching is possible, the ic can be efficiently set thereby saving energy. the small sot-89 package makes high density mounting possible. low on-state resistance : rds(on)=0.25 ? (vgs=-4.5v) : rds(on)=0.4 ? (vgs=-2.5v) ultra high-speed switching operational voltage : -2.5v high density mounting : sot-89 notebook pcs cellular and portable phones on-board power supplies li-ion battery systems p-channel power mos fet dmos structure low on-state resistance: 0.25 ? (max) ultra high-speed switching sot-89 package 4 0 5 5 0 1 7 * & 8 ( 1 $ i b o o f m . 0 4 ' & 5 e f w j d f c v j m u j o
pin number pin name function 1 3 2 g s d gate source drain parameter drain-source voltage gate-source voltage drain current (dc) drain current (pulse) reverse drain current continuous channel power dissipation (note) channel temperature storage temperature vdss vgss id idp idr pd tch tstg -20 12 -2 -6 -2 2 150 -55~150 v v a a a w : : symbol ratings units ta=25 : when implemented on a ceramic pcb note: 4 @ 9 1 " # 1 3 1 . ??
9 1 " # 1 3 871 11 & m f d u s j d b m $ i b s b d u f s j t u j d t dc characteristics ta=25 : parameter units gate-source cut-off voltage vgs(off) -0.5 v 0.40.3id=-1a, vgs=-2.5v ? gate-source leakage current igss a 10 forward transfer admittance (note) 2.5 s body drain diode forward voltage -0.85 -1.1 v drain cut-off current idss -10 a vf vds=-20v, vgs=0v id=-1ma, vds=-10v id=-1a, vds=-10v if=-2a, vgs=0v vgs= 12v, vds=0v drain-source on-state resistance (note) rds(on) ? id=-1a, vgs=-4.5v 0.19 0.25 symbol conditions maxmin typ parameter units feedback capacitance crss pf output capacitance coss pf input capacitance ciss 65 180 320 pf vds=-10v, vgs=0v f=1mhz symbol conditions maxmin typ dynamic characteristics ta=25 : effective during pulse test. note: yfs parameter units fall time tf ns rise time tr ns turn-on delay time td (on) 50 turn-off delay time td (off) ns 40 15 10ns vgs=-5v, id=-1a vdd=-10v symbol conditions maxmin typ switching characteristics ta=25 : parameter units rth (ch-a) thermal resistance (channel-ambience) 62.5 : /w implement on a ceramic pcb symbol conditions maxmin typ thermal characteristics 4 @ 9 1 " # 1 3 1 . ??
9 1 " # 1 3 872 11 5 z q j d b m 1 f s g p s n b o d f $ i b s b d u f s j t u j d t drain-source on-state resistance :rds (on) ( ? ) ambient temp.:topr ( : ) drain-source on-state resistance vs. ambient temperature pulse test * e1 " " "
" 7 7 h t1 7 gate-source cut-off voltage variance :vgs (off) variance (v) ambient temp.:topr ( : ) gate-source cut-off voltage variance vs. ambient temperature vds=-10v, id=-1ma drain current:id (a) drain-source voltage:vds (v) drain current vs. drain-source voltage pulse test, ta=25 : 7 7 7 h t1 7 7 7 7 7 7 drain current:id (a) gate-source voltage:vgs (v) drain current vs. gate-source voltage pulse test, vds=-10v ? 5 p q s1 ? ? drain-source on-state resistance :rds (on) ( ? ) gate-source voltage:vgs (v) drain-source on-state resistance vs. gate-source voltage pulse test, ta=25 : * e1 " " drain-source on-state resistance :rds (on) ( ? ) drain current:id (a) drain-source on-state resistance vs. drain current pulse test, ta=25 : 7 7 h t1 7 4 @ 9 1 " # 1 3 1 . ??
9 1 " # 1 3 873 11 capacitance:c (pf) drain-source voltage:vds (v) capacitance vs. drain-source voltage vgs=0v, f=1mhz $ j t t $ p t t $ s t t switching time:t (ns) drain current:id (a) switching time vs. drain current vgs=-5v, vdd -10v, pw=10 sec. duty 1% u g u e p g g u e p o u s gate-source voltage:vgs (v) gate charge:qg (nc) gate-source voltage vs. gate charge vds=-10v, id=-2a reverse drain current:id (a) source-drain voltage:vsd (v) reverse drain current vs. source-drain voltage pulse test
7 7 7 h t1 7 pulse width:pw (sec) standardized transition thermal resistance vs. pulse width rth (ch-a)=62.5?c/w, (implemented on a ceramic pcb) single pulse 4 u b o e b s e j [ f e 5 s b o t j u j p o 5 i f s n b m 3 f t j t u b o d f
t u
4 @ 9 1 " # 1 3 1 . ??
|
