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SL74LS05 Hex Inverters with Open-Drain Outputs This device contains idenpendent inverts. It performs the Boolean function Y=A. The open collector outputs require pull-up resistor to perform correctly. Open-collector devices are often used to generate higher VOH levels. Pull-Up Resistor Equations VCC(Min) - VOH RMAX= N1(IOH) + N2(IIH) VCC(Max) - VOL RMIN= (IOL + N3(IIL) ORDERING INFORMATION SL74LS05N Plastic SL74LS05D SOIC TA = -0 to 70 C for all packages Where: N1(IOH)=total maximumoutput high current for all outputs tied to pull-up resistor N2(IIH)=total input high current for all inputs tied to pull-up resistor N3(IIL)=total input low current for all inputs tied to pull-up resistor PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs A L H Output Y H L PIN 14 =VCC PIN 7 = GND SLS System Logic Semiconductor SL74LS05 MAXIMUM RATINGS * Symbol VCC VIN VOUT Tstg * Parameter Supply Voltage Input Voltage Output Voltage Storage Temperature Range Value 7.0 7.0 7.0 -65 to +150 Unit V V V C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. RECOMMENDED OPERATING CONDITIONS Symbol VCC VIH VIL VOH IOL TA Supply Voltage High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Current Ambient Temperature Range 0 Parameter Min 4.75 2.0 0.8 5.5 8.0 +70 Max 5.25 Unit V V V V mA C DC ELECTRICAL CHARACTERISTICS over full operating conditions Guaranteed Limit Symbol VIK IOH VOL Parameter Input Clamp Voltage High Level Output Current Low Level Output Voltage Test Conditions VCC = min, IIN = -18 mA VCC = min, VOH =max VCC = min, IOL = 4 mA VCC = min, IOL = 8 mA IIH High Level Input Current VCC = max, VIN = 2.7 V VCC = max, VIN = 7.0 V IIL ICC Low Level Input Current Supply Current VCC = max, VIN = 0.4 V VCC = max Total with outputs high Total with outputs low Min Max -1.5 0.1 0.4 0.5 20 0.1 -0.4 2.4 6.6 A mA mA mA Unit V mA V SLS System Logic Semiconductor SL74LS05 AC ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, CL = 15 pF, TA=25C, RL = 2 k, t r =15 ns, tf = 6.0 ns) Symbol tPLH tPHL Propagation Delay Time Propagation Delay Time Parameter Min Max 32 28 Unit ns ns Figure 1. Switching Waveforms NOTE A. CL includes probe and jig capacitance. Figure 2. Test Circuit SLS System Logic Semiconductor |
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