| PART |
Description |
Maker |
| IS25LQ016 |
16 Mbit Single Operating Voltage Serial Flash Memory With 104
|
Integrated Silicon Solution, Inc
|
| IS25LQ040 |
4 Mbit Single Operating Voltage Serial Flash Memory With 104
|
Integrated Silicon Solution, Inc
|
| AM42DL16X2D |
16 Mbit (2 M x 8-Bit/1 M x 16-Bit) CMOS and 2 Mbit (128 K x 16-Bit) Static RAM (Preliminary)
From old datasheet system
|
AMD Inc
|
| AM50DL128CG |
2 x 64 Mbit (8 M x 8-Bit/4 M x 16-Bit) CMOS and 64 Mbit (2 M x 16-Bit) Pseudo Static RAM (Preliminar
From old datasheet system
|
AMD Inc
|
| KM68257E KM68257E-10 KM68257E-12 KM68257E-15 KM682 |
32Kx8 bit high-speed CMOS static RAM (5V operating), 15ns
32Kx8 bit high-speed CMOS static RAM (5V operating), 10ns
32Kx8 Bit High-Speed CMOS Static RAM(5V Operating) Operated at Commercial and Industrial Temperature Ranges. 32Kx8位高速CMOS静态RAMV的工作），在商业和工业温度范围操作
32Kx8 bit high-speed CMOS static RAM (5V operating), 12ns
|
Samsung Semiconductor Co., Ltd.
SAMSUNG SEMICONDUCTOR CO. LTD.
SAMSUNG[Samsung semiconductor]
Samsung Electronic
|
| M38030F2L-XXXHP M38030F2L-XXXKP M38030F2L-XXXSP M3 |
256 Kbit (32K x 8) nvSRAM; Organization: 32Kb x 8; Vcc (V): 2.7 to 3.6 V; Density: 256 Kb; Package: SOIC
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 5; Operating Range: 0 to 70 C
256K (32K x 8) Static RAM; Density: 256 Kb; Organization: 32Kb x 8; Vcc (V): 4.50 to 5.50 V;
Three-PLL General Purpose FLASH Programmable Clock Generator; Voltage (V): 3.3 V; Input Range: 1 MHz to 166 MHz; Output Range: 1 MHz to 200 MHz; Outputs: 6
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 256; Vcc (V): 3.3; fMax (MHz): 66; tPD (ns): 12
8-Mbit (512K x 16) Static RAM; Density: 8 Mb; Organization: 512Kb x 16; Vcc (V): 2.20 to 3.60 V;
9-Mbit (256K x 36/512K x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 3.1 to 3.6 V
9-Mbit (256K x 36/512K x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 3.1 to 3.6 V
18-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 1.7 to 1.9 V
Four Output PCI-X and General Purpose Buffer; Voltage (V): 3.3 V; Frequency Range: 0 MHz to 140 MHz; Outputs: 4; Operating Range: 0 to 70 C
18-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 1.7 to 1.9 V
9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 3.1 to 3.6 V
9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 2.4 to 2.6 V
4-Mbit (512K x 8) Static RAM; Density: 4 Mb; Organization: 512Kb x 8; Vcc (V): 4.50 to 5.50 V;
4-Mbit (256K x 16) Static RAM; Density: 4 Mb; Organization: 256Kb x 16; Vcc (V): 2.20 to 3.60 V;
64K x 16 Static RAM; Density: 1 Mb; Organization: 64Kb x 16; Vcc (V): 3.0 to 3.6 V;
1-Mbit (64K x 16) Static RAM; Density: 1 Mb; Organization: 64Kb x 16; Vcc (V): 4.5 to 5.5 V;
9-Mbit (256K x 36/512K x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 9 Mb; Organization: 256Kb x 36; Vcc (V): 3.1 to 3.6 V
1-Mbit (64K x 16) Static RAM; Density: 1 Mb; Organization: 64Kb x 16; Vcc (V): 3.0 to 3.6 V;
4 Mbit (512K x 8/256K x 16) nvSRAM; Organization: 512Kb x 8; Vcc (V): 2.7 to 3.6 V; Density: 4 Mb; Package: TSOP
4 Mbit (512K x 8/256K x 16) nvSRAM; Organization: 256Kb x 16; Vcc (V): 2.7 to 3.6 V; Density: 4 Mb; Package: TSOP
16-Mbit (1M x 16 / 2M x 8) Static RAM; Density: 16 Mb; Organization: 1Mb x 16; Vcc (V): 4.50 to 5.50 V;
4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT, BUSY; Density: 128 Kb; Organization: 8Kb x 16; Vcc (V): 4.5 to 5.5 V; Speed: 35 ns
9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 9 Mb; Organization: 256Kb x 36; Vcc (V): 3.1 to 3.6 V
9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 9 Mb; Organization: 256Kb x 36; Vcc (V): 3.1 to 3.6 V
9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 9 Mb; Organization: 256Kb x 36; Vcc (V): 2.4 to 2.6 V
9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 3.1 to 3.6 V
8-Mbit (512K x 16) Static RAM; Density: 8 Mb; Organization: 512Kb x 16; Vcc (V): 4.50 to 5.50 V;
9-Mbit (256K x 36/512K x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 9 Mb; Organization: 256Kb x 36; Vcc (V): 3.1 to 3.6 V
256K x 16 Static RAM; Density: 4 Mb; Organization: 256Kb x 16; Vcc (V): 4.5 to 5.5 V;
9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM; Architecture: Standard Sync, Pipeline DCD; Density: 9 Mb; Organization: 256Kb x 36; Vcc (V): 3.1 to 3.6 V
4-Mbit (256K x 16) Static RAM; Density: 4 Mb; Organization: 256Kb x 16; Vcc (V): 3.0 to 3.6 V;
8-Mbit (1024K x 8) Static RAM; Density: 8 Mb; Organization: 1Mb x 8; Vcc (V): 2.20 to 3.60 V;
18-Mbit (512K x 36/1M x 18) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
256K x 16 Static RAM; Density: 4 Mb; Organization: 256Kb x 16; Vcc (V): 3.0 to 3.6 V;
8-Mbit (1M x 8) Static RAM; Density: 8 Mb; Organization: 1Mb x 8; Vcc (V): 2.20 to 3.60 V;
3.3V Zero Delay Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 8; Operating Range: -40 to 85 C
Programmable Skew Clock Buffer; Voltage (V): 5.0 V; Operating Frequency: 3.75 MHz to 80 MHz; Outputs: 8; Operating Range: -40 to 85 C
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512K x 36/1M x 18) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
512K x 8 Static RAM; Density: 4 Mb; Organization: 512Kb x 8; Vcc (V): 4.5 to 5.5 V;
18-Mbit (512K x 36/1M x 18) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 2.4 to 2.6 V
2.5V or 3.3V, 200-MHz, 1:12 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 0 MHz to 200 MHz; Outputs: 12; Operating Range: -40 to 85 C
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 5; Operating Range: -40 to 85 C
2M x 8 Static RAM; Density: 16 Mb; Organization: 2Mb x 8; Vcc (V): 3.0 to 3.6 V;
16 Mbit (512K X 32) Static RAM; Density: 16 Mb; Organization: 512Kb x 32; Vcc (V): 3.0 to 3.6 V;
3.3V Zero Delay Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 8; Operating Range: 0 to 70 C
8-Mbit (1M x 8) Static RAM; Density: 8 Mb; Organization: 1Mb x 8; Vcc (V): 3.0 to 3.6 V;
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 5; fMax (MHz): 125; tPD (ns): 6
2-Mbit (128K x 16) Static RAM; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 3.0 to 3.6 V;
16-Mbit (1M x 16) Static RAM; Density: 16 Mb; Organization: 1Mb x 16; Vcc (V): 3.0 to 3.6 V;
4-Mbit (256K x 18) Pipelined DCD Sync SRAM; Architecture: Standard Sync, Pipeline DCD; Density: 4 Mb; Organization: 256Kb x 18; Vcc (V): 3.1 to 3.6 V
512K (32K x 16) Static RAM; Density: 512 Kb; Organization: 32Kb x 16; Vcc (V): 3.0 to 3.6 V;
4-Mbit (128K x 36) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 4 Mb; Organization: 128Kb x 36; Vcc (V): 3.1 to 3.6 V
1M x 16 Static RAM; Density: 16 Mb; Organization: 1Mb x 16; Vcc (V): 3.0 to 3.6 V;
Programmable Skew Clock Buffer; Voltage (V): 5.0 V; Operating Frequency: 3.75 MHz to 80 MHz; Outputs: 8; Operating Range: 0 to 70 C
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 9; Operating Range: 0 to 70 C
MoBL(R) 2 Mbit (128K x 16) Static RAM; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 2.20 to 3.60 V;
Rambus(R) XDR(TM) Clock Generator; VDD: 2.5 V; Input Frequency: 100 MHz to 133 MHz; Output Frequency: 300 MHz to 800 MHz; # Out: 4
2-Mbit (128K x 16) Static RAM; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 2.20 to 3.60 V;
4-Mbit (128K x 36) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 4 Mb; Organization: 128Kb x 36; Vcc (V): 3.1 to 3.6 V
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 128; Vcc (V): 5; fMax (MHz): 167; tPD (ns): 7
2.5V or 3.3V, 200-MHz, 1:10 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 0 MHz to 200 MHz; Outputs: 10; Operating Range: 0 to 70 C
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 128; Vcc (V): 5; fMax (MHz): 100; tPD (ns): 7
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 128; Vcc (V): 5; fMax (MHz): 125; tPD (ns): 7
18-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 1.7 to 1.9 V
Low Voltage Programmable Skew Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 3.75 MHz to 80 MHz; Outputs: 8; Operating Range: 0 to 70 C
Spread Spectrum Clock Generator; Voltage(V): 3.3 V; Input Frequency Range: 25 MHz to 100 MHz; Output Frequency Range: 25 MHz to 100 MHz; Operating Range: 0 to 70 C; Package: SOIC
Low Skew Clock Buffer; Voltage (V): 5.0 V; Operating Frequency: 3.75 MHz to 80 MHz; Outputs: 8; Operating Range: 0 to 70 C
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 3.3; fMax (MHz): 143; tPD (ns): 9 单芯位CMOS微机
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 5; fMax (MHz): 154; tPD (ns): 6 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 3.3; fMax (MHz): 100; tPD (ns): 9 单芯位CMOS微机
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 128; Vcc (V): 3.3; fMax (MHz): 83; tPD (ns): 10 单芯位CMOS微机
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 5; fMax (MHz): 125; tPD (ns): 6 单芯位CMOS微机
Three-PLL General-Purpose EPROM Programmable Clock Generator; Voltage (V): 3.3/5.0 V; Input Range: 1 MHz to 30 MHz; Output Range: .077 MHz to 100 MHz; Outputs: 6 单芯位CMOS微机
8-Mbit (512K x 16) MoBL(R) Static RAM; Density: 8 Mb; Organization: 512Kb x 16; Vcc (V): 2.20 to 3.60 V; 单芯位CMOS微机
High Speed Low Voltage Programmable Skew Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 3.75 MHz to 110 MHz; Outputs: 8; Operating Range: 0 to 70 C 单芯位CMOS微机
3.3V SDRAM Buffer for Mobile PCs with 4 SO-DIMMs; Voltage (V): 3.3 V; Frequency Range: 0 MHz to 100 MHz; Outputs: 10; Operating Range: 0 to 70 C 单芯位CMOS微机
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 9; Operating Range: -40 to 85 C 单芯位CMOS微机
Programmable Skew Clock Buffer; Voltage (V): 5.0 V; Operating Frequency: 3.75 MHz to 80 MHz; Outputs: 8; Operating Range: -40 to 85 C 单芯位CMOS微机
2-Mbit (128K x 16) Static RAM; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 3.0 to 3.6 V; 单芯位CMOS微机
MoBL(R) 1 Mbit (128K x 8) Static RAM; Density: 1 Mb; Organization: 128Kb x 8; Vcc (V): 2.20 to 3.60 V; 单芯位CMOS微机
18-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
1-Mbit (128K x 8) Static RAM; Density: 1 Mb; Organization: 128Kb x 8; Vcc (V): 4.50 to 5.50 V; 单芯位CMOS微机
4-Mbit (256K x 18) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 4 Mb; Organization: 256Kb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
2-Mbit (64K x 32) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 2 Mb; Organization: 64Kb x 32; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
200-MHz Field Programmable Zero Delay Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 10 MHz to 200 MHz; Outputs: 12; Operating Range: -40 to 85 C 单芯位CMOS微机
2-Mbit (128K x 16) Static RAM; Density: 2 Mb; Organization: 128Kb x 16; Vcc (V): 2.20 to 3.60 V; 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机
2-Mbit (256K x 8) Static RAM; Density: 2 Mb; Organization: 256Kb x 8; Vcc (V): 2.20 to 3.60 V; 单芯8位CMOS微机
Very Low Jitter Field and Factory Programmable Clock Generator; Voltage (V): 3.3 V; Input Range: 10 MHz to 133 MHz; Output Range: 20 MHz to 200 MHz; Outputs: 2 单芯位CMOS微机
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 5; Operating Range: 0 to 70 C 单芯位CMOS微机
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 5; Operating Range: -40 to 85 C 单芯位CMOS微机
Three-PLL General Purpose FLASH Programmable Clock Generator; Voltage (V): 3.3 V; Input Range: 1 MHz to 166 MHz; Output Range: 0 MHz to 200 MHz; Outputs: 3 单芯位CMOS微机
1:8 Clock Fanout Buffer; Voltage (V): 3.3 V; Frequency Range: 0 MHz to 350 MHz; Outputs: 8; Operating Range: -40 to 85 C 单芯位CMOS微机
Quad PLL Clock Generator with 2-Wire Serial Interface; Voltage (V): 2.5/3.3 V; Input Range: 27 MHz to 27 MHz; Output Range: 4.2 MHz to 166 MHz; Outputs: 5 单芯位CMOS微机
2.5V or 3.3V, 200-MHz, 1:12 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 0 MHz to 200 MHz; Outputs: 12; Operating Range: 0 to 70 C 单芯位CMOS微机
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 9; Operating Range: 0 to 70 C 单芯位CMOS微机
High Speed Multi-phase PLL Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 24 MHz to 200 MHz; Outputs: 11; Operating Range: 0 to 70 C 单芯位CMOS微机
2.5V or 3.3V, 200-MHz, 1:18 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 0 MHz to 200 MHz; Outputs: 18; Operating Range: -40 to 85 C 单芯位CMOS微机
-bit AVR Microcontroller with 8K Bytes In- System Programmable Flash 位AVR微控制器具有8K字节的系统内可编程闪
2.5V or 3.3V, 200-MHz, 1:12 Clock Distribution Buffer; Voltage (V): 2.5/3.3 V; Frequency Range: 0 MHz to 200 MHz; Outputs: 12; Operating Range: 0 to 70 C
1:8 Clock Fanout Buffer; Voltage (V): 3.3 V; Frequency Range: 0 MHz to 350 MHz; Outputs: 8; Operating Range: 0 to 70 C
Spread Spectrum Clock Generator; Voltage(V): 3.3 V; Input Frequency Range: 4 MHz to 32 MHz; Output Frequency Range: 4 MHz to 32 MHz; Operating Range: 0 to 70 C; Package: SOIC
High Speed Low Voltage Programmable Skew Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 3.75 MHz to 110 MHz; Outputs: 8; Operating Range: 0 to 70 C
5V, 3.3V, ISR(TM) High-Performance CPLDs; # Macrocells: 64; Vcc (V): 3.3; fMax (MHz): 100; tPD (ns): 9
|
Renesas Electronics Corporation.
Renesas Electronics, Corp.
|
| AM41PDS3224D |
32 Mbit (2 M x 16-Bit) CMOS 1.8 Volt-only. Simultaneous Operation Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM (Preliminary) 32兆位米16位）的CMOS电压1.8只。同时采取行动，页面模式闪存兆位12x 8-Bit/256x 16位），静态存储器（初步）
Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
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Advanced Micro Devices
|
| K6R4004C1C-C K6R4004C1C-I20 K6R4004C1C-C10 K6R4004 |
1Mx4 Bit High Speed Static RAM(5V Operating). 1Mx4位高速静态RAMV的工作）
1Mx4 Bit High Speed Static RAM(5V Operating). 1Mx4位高速静RAMV的工作）
1Mx4 Bit High Speed Static RAM(5V Operating). 1Mx4位高速静态RAM5V的工作）
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Samsung Semiconductor Co., Ltd.
SAMSUNG SEMICONDUCTOR CO. LTD.
SAMSUNG[Samsung semiconductor]
Samsung Electronic
|
| SST34HF1682C-70-4E-B1PE SST34HF1642C-70-4E-B1PE SS |
16-Bit Delta-Sigma ADC with internal reference, PGA and oscillator. I2C Serial Interface 6-SOT-23
CONNECTOR
15V 0.2A, Wide-Input Integrated Switching Regulator 3-SIP MODULE
XTAL MTL SMT HC49/USM
XTAL CER SMT 7X5 2PAD
Self-Calibrating, 16-Bit Analog-to-Digital Converter 6-SOT-23 -40 to 85
16-Bit Delta-Sigma ADC with internal reference, PGA and oscillator. I2C Serial Interface 6-SOT-23
16 Mbit Concurrent SuperFlash 2/4/8 Mbit SRAM ComboMemory 16兆兆位并行的SuperFlash 2/4/8 SRAMComboMemory
16 Mbit Concurrent SuperFlash 2/4/8 Mbit SRAM ComboMemory 16兆兆位并行的SuperFlash 2/4/8 SRAM的ComboMemory
16 Mbit Concurrent SuperFlash 2/4/8 Mbit SRAM ComboMemory SPECIALTY MEMORY CIRCUIT, PBGA56
XTAL MTL T/H HC49/U 16兆兆位并行的SuperFlash 2/4/8 SRAM的ComboMemory
Replaced by OPA128 : 16兆兆位并行的SuperFlash 2/4/8 SRAM的ComboMemory
CANMS27656T25B19S 16兆兆位并行的SuperFlash 2/4/8 SRAMComboMemory
16 Mbit Concurrent SuperFlash 2/4/8 Mbit SRAM ComboMemory SPECIALTY MEMORY CIRCUIT, PBGA62
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Silicon Storage Technology, Inc.
NIC Components, Corp.
SILICON STORAGE TECHNOLOGY INC
|
| AM45DL3208GNBSP AM45DL3208G |
32 Mbit (4 M x 8-Bit/2 M x 16-Bit) CMOS and 8 Megabit (1 M x 8-Bit/512 K x 16-Bit) (Preliminary)
From old datasheet system
|
AMD Inc
|
| CBT3306D-T CBT3306GM |
Dual bus switch - # of Bits per Enable: 1 ; Description: Bus Switch ; Number of bits: 2 ; Operating temperature: -40~85 Cel; Operating voltage: 4.5~5.5 VDC CBT/FST/QS/5C/B SERIES, DUAL 1-BIT DRIVER, TRUE OUTPUT, PDSO8
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NXP Semiconductors N.V.
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| ST72324BXX |
8-bit MCU, 3.8 to 5.5 V operating range with 8 to 32 Kbyte Flash/ROM, 10-bit ADC, 4 timers, SPI, SCI
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意法半导
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