| PART |
Description |
Maker |
| MM74C74N MM74C74 MM74C74M MM74C74MX |
Dual D Flip-Flop; Package: SOIC; No of Pins: 14; Container: Tape & Reel CMOS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
From old datasheet system
Dual D-Type Flip-Flop
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| 74VHC74MTC 74VHC74N 74VHC74SJ 74VHC74 74VHC74MTCX |
Dual D-Type Flip-Flop 双D型触发器
Supervisor Push-Pull Active High, -40C to 85C, 3-SOT-23, T/R
Dual D-Type Flip-Flop with Preset and Clear
|
Fairchild Semiconductor, Corp.
|
| 100351QC 100351 100351SC 100351PC 100351QI 100351Q |
From old datasheet system
Low Power Hex D-Type Flip-Flop
Hex D-Type Flip-Flop 100K SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO24
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor, Corp.
|
| 74VHCT74A 74VHCT74AM 74VHCT74ASJ 74VHCT74 74VHCT74 |
Octal D-type Edge-Triggered Flip-Flops With 3-State Outputs 20-SOIC -40 to 85 AHCT/VHCT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14
Dual D-Type Flip-Flop with Preset and Clear AHCT/VHCT/VT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| 74AUP2G80GT 74AUP2G80GM 74AUP2G80DC 74AUP2G80 74AU |
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT833-1 (XSON8U); Container: Reel Pack, SMD, 7" AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8
|
PHILIPS[Philips Semiconductors]
NXP Semiconductors N.V.
|
| 5962F9863501VXC 5962F9863501VCC 5962F9863501V9A AC |
3-line to 8-line decoder / demultiplexer 16-SOIC 0 to 70
Contact Protector; Weight:163g
Radiation Hardened Quad D-Type Flip-Flop
with Reset(抗辐射四D触发器（带复位功能）)
Radiation Hardened Quad D-Type Flip- Flop with Reset AC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Radiation Hardened Quad D-Type Flip- Flop with Reset AC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC16
Radiation Hardened Quad D-Type Flip- Flop with Reset
|
Intersil Corporation
Intersil, Corp.
|
| 74AUP2G80GD125 74AUP2G80GM125 |
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT996-2 (XSON8U); Container: Reel Pack, Reverse, Reverse AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT902-1 (XQFN8U); Container: Reel Pack, Reverse, Reverse
|
NXP Semiconductors N.V.
|
| 74ACTQ574PC 74ACQ574 74ACQ574PC 74ACQ574SC 74ACQ57 |
Quiet Series Octal D Flip-Flop with 3-STATE Outputs
Quiet SeriesOctal D-Type Flip-Flop with 3-STATE Outputs
18-Bit LVTTL-to-GTLP Bus Transceiver with Source Synchronous Clock Outputs 56-TSSOP -40 to 85
Quiet Series Octal D-Type Flip-Flop with 3-STATE Outputs
Quiet Series⑩ Octal D-Type Flip-Flop with 3-STATE Outputs
From old datasheet system
|
Fairchild Semiconductor Corporation
FAIRCHILD[Fairchild Semiconductor]
|
| 74LCX74SJ 74LCX74MX_NL 74LCX74 74LCX74BQX 74LCX74M |
Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs
Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, QCC14
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor, Corp.
|
| HCTS112MS HCTS112D HCTS112DMSR HCTS112HMSR HCTS112 |
Radiation Hardened Dual JK Flip-Flop HCT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC16
|
Intersil, Corp.
INTERSIL[Intersil Corporation]
|
| MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR |
5V Dual Differential PECL to TTL Translator
5V ECL Low Impedance Driver
Dual Type D Master-Slave Flip-Flop
ECL/TTL Clock Driver
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V / 5V ECL ÷4 Divider
Quad 2-Input NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V / 5V Triple ECL Input to LVPECL/PECL Output Translator
|
ON Semiconductor
|
| MC100LVEL29DWR2 |
3.3V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset 100LVEL SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO20
|
ON Semiconductor
|
