| PART |
Description |
Maker |
| WED2ZLRSP01S42BC WED2ZLRSP01S50BI WED2ZLRSP01S38BC |
512K x 32/256K x 32 Dual Array Synchronous Pipeline Burst NBL SRAM
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WEDC[White Electronic Designs Corporation]
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| IS61LPD51218T/D IS61LPD25632T/D IS61SPD25632T/D IS |
256K x 32, 256K x 36, 512K x 18 SYNCHRONOUS PIPELINE, DOUBLE-CYCLE DESELECT STATIC RAM 256K × 3256K × 3612K采样× 18 SYNCHRONOU?管道，双循环取消选择静态RAM
256K X 36 CACHE SRAM, 3.5 ns, PQFP100 TQFP-100
256K x 32/ 256K x 36/ 512K x 18 SYNCHRONOUS PIPELINE/ DOUBLE-CYCLE DESELECT STATIC RAM
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Integrated Silicon Solution, Inc.
Integrated Silicon Solution Inc
|
| IS61NLP51218 IS61NP51218 |
256K x 32, 256K x 36 and 512K x 18 PIPELINE NO WAIT STATE BUS SRAM
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Integrated Silicon Solu...
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| GS881E36 GS881E36T-11.5I GS881E36T-66I GS881E36T-1 |
512K x 18, 256K x 36 ByteSafe 8Mb Sync Burst SRAMs
8Mb56K x 36Bit)ByteSafe Synchronous Burst SRAM(8M位（256K x 36位）ByteSafe同步静态RAM（带2位脉冲地址计数器）)
|
http://
GSI Technology
|
| GS880F18 GS880F36T-11I GS880F36T-14 GS880F36T-12I |
8Mb12K x 18Bit) Synchronous Burst SRAM(8M位（512K x 18位）同步静态RAM（带2位脉冲地址计数器）)
512K x 18, 256K x 36 8Mb Sync Burst SRAMs 256K X 36 CACHE SRAM, 11 ns, PQFP100
512K x 18, 256K x 36 8Mb Sync Burst SRAMs 256K X 36 CACHE SRAM, 14 ns, PQFP100
512K x 18, 256K x 36 8Mb Sync Burst SRAMs 256K X 36 CACHE SRAM, 12 ns, PQFP100
512K x 18, 256K x 36 8Mb Sync Burst SRAMs 512K X 18 CACHE SRAM, 12 ns, PQFP100
512K x 18, 256K x 36 8Mb Sync Burst SRAMs 512K X 18 CACHE SRAM, 11.5 ns, PQFP100
512K x 18, 256K x 36 8Mb Sync Burst SRAMs 512K X 18 CACHE SRAM, 11 ns, PQFP100
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GSI Technology, Inc.
Molex, Inc.
|
| GS880E32AT-250 |
512K x 18, 256K x 32, 256K x 36 9Mb Synchronous Burst SRAMs 256K X 32 CACHE SRAM, 5.5 ns, PQFP100
|
GSI Technology, Inc.
|
| GS88136BD-200I GS88136BD-133I GS88136BD-150 GS8813 |
200MHz 6.5ns 256K x 36 9Mb sync burst SRAM
133MHz 8.5ns 256K x 36 9Mb sync burst SRAM
150MHz 7.5ns 256K x 36 9Mb sync burst SRAM
166MHz 7ns 256K x 36 9Mb sync burst SRAM
|
GSI Technology
|
| IDT71V2548S133PF IDT71V2548S133BGI IDT71V2548SA133 |
128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs 128K X 36 ZBT SRAM, 4.2 ns, PBGA165
128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs 128K的3656 × 18 3.3同步ZBT SRAM.5VI / O的脉冲计数器输出流水
128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs 256K X 18 ZBT SRAM, 3.8 ns, PBGA165
128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs 256K X 18 ZBT SRAM, 3.8 ns, PQFP100
25V N-Channel PowerTrench MOSFET; Package: TO-251(IPAK); No of Pins: 3; Container: Rail 128K的3656 × 18 3.3同步ZBT SRAM.5VI / O的脉冲计数器输出流水
128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs 128K X 36 ZBT SRAM, 5 ns, PBGA165
128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs 128K的36256 × 18 3.3同步ZBT SRAM2.5VI / O的脉冲计数器输出流水
128K x 36/ 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O/ Burst Counter Pipelined Outputs
3.3V 256K x 18 ZBT Synchronous PipeLined SRAM w/2.5V I/O
3.3V 128Kx36 ZBT Synchronous PipeLined SRAM with 2.5V I/O
|
Integrated Device Technology, Inc.
IDT
|
| AS7C3364PFD32-36BV.1.1 AS7C3364PFD36B-200TQIN AS7C |
3.3V 64K X 32/36 pipeline burst synchronous SRAM 64K X 36 STANDARD SRAM, 3 ns, PQFP100
3.3V 64K X 32/36 pipeline burst synchronous SRAM 64K X 32 STANDARD SRAM, 3.5 ns, PQFP100
3.3V 64K X 32/36 pipeline burst synchronous SRAM 64K X 32 STANDARD SRAM, 3 ns, PQFP100
3.3V 64K X 32/36 pipeline burst synchronous SRAM 64K X 36 STANDARD SRAM, 4 ns, PQFP100
From old datasheet system
|
Alliance Semiconductor, Corp.
ALSC[Alliance Semiconductor Corporation]
|
| 7C33128PFS32A |
3.3V 128K x 32/36 pipeline burst synchronous SRAM
|
Alliance Semiconductor
|
| AS7C33256PFD32A-166TQIN AS7C33256PFD32A-133TQCN AS |
3.3V 256K x 32/36 pipelined burst synchronous SRAM 256K X 32 STANDARD SRAM, 4 ns, PQFP100
3.3V 256K x 32/36 pipelined burst synchronous SRAM 3.3 256 × 32/36管线爆裂同步SRAM
3.3V 256K x 32/36 pipelined burst synchronous SRAM 256K X 32 STANDARD SRAM, 3.5 ns, PQFP100
|
Alliance Semiconductor Corp...
Alliance Semiconductor, Corp.
|
| M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
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Renesas Electronics Corporation.
Renesas Electronics, Corp.
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