| PART |
Description |
Maker |
| IS61NP25632 IS61NP25636 IS61NP51218 IS61NP25632-5T |
256K x 32, 256K x 36 and 512K x 18 PIPELINE NO WAIT STATE BUS SRAM 512K X 18 ZBT SRAM, 4.2 ns, PBGA119
256K x 32, 256K x 36 and 512K x 18 PIPELINE NO WAIT STATE BUS SRAM 512K X 18 ZBT SRAM, 5 ns, PBGA119
256K x 32, 256K x 36 and 512K x 18 PIPELINE NO WAIT STATE BUS SRAM 256K X 32 ZBT SRAM, 4.2 ns, PBGA119
256K x 32, 256K x 36 and 512K x 18 PIPELINE NO WAIT STATE BUS SRAM 256K X 32 ZBT SRAM, 5 ns, PBGA119
256K x 32, 256K x 36 and 512K x 18 PIPELINE NO WAIT STATE BUS SRAM 256K X 32 ZBT SRAM, 5 ns, PQFP100
256K x 32, 256K x 36 and 512K x 18 PIPELINE NO WAIT STATE BUS SRAM 256K X 36 ZBT SRAM, 4.2 ns, PQFP100
Quadruple 2-Input Positive-OR Gates 14-SOIC -40 to 85 256K X 36 ZBT SRAM, 5 ns, PQFP100
Quadruple 2-Input Positive-OR Gates 14-SOIC -40 to 85 256K X 36 ZBT SRAM, 5 ns, PBGA119
256K x 32, 256K x 36 and 512K x 18 PIPELINE NO WAIT STATE BUS SRAM 256K X 36 ZBT SRAM, 4.2 ns, PBGA119
256K x 32, 256K x 36 and 512K x 18 PIPELINE NO WAIT STATE BUS SRAM 512K X 18 ZBT SRAM, 5 ns, PQFP100
256K x 32, 256K x 36 and 512K x 18 PIPELINE NO WAIT STATE BUS SRAM 256K X 32 ZBT SRAM, 4.2 ns, PQFP100
256K x 32, 256K x 36 and 512K x 18 PIPELINE NO WAIT STATE BUS SRAM 512K X 18 ZBT SRAM, 4.2 ns, PQFP100
256K x 32, 256K x 36 and 512K x 18 PIPELINE NO WAIT STATE BUS SRAM 256K × 3256K × 36和管道为512k × 18编号WAIT状态总线的SRAM
|
Integrated Silicon Solution, Inc.
INTEGRATED SILICON SOLUTION INC
|
| EUA6210 EUA6210MIR1 |
128K x 36, 3.3V, Sync Burst Pipeline
Output Capacitor-less 67mW Stereo Headphone Amplifier
128K x 32, 3.3V, Sync Burst Pipeline
|
寰蜂俊绉???′唤??????
Eutech Microelectronics Inc
德信科技股份有限公司
|
| AS7C33128PFS32B AS7C33128PFS32A |
(AS7C33128PFS32A / AS7C33128PFS36A) 3.3V 128K X 32/36 pipeline burst synchronous SRAM
(AS7C33128PFS32B / AS7C33128PFS36B) 3.3V 128K X 32/36 pipeline burst synchronous SRAM
|
Alliance Semiconductor Corporation
|
| AS7C33128PFS16A AS7C33128PFS18A AS7C33128PFS18A-13 |
3.3V 128K x 18 pipeline burst synchronous SRAM, clock speed - 133 MHz
3.3V 128K x 16/18 pipeline burst synchronous SRAM
3.3V 128K x 16 pipeline burst synchronous SRAM, clock speed - 133 MHz
|
Alliance Semiconductor
|
| AS7C3128PFD32A-4TQC AS7C3128PFD36A-4TQC AS7C3128PF |
3.3V 128K x 36 pipeline burst synchronous SRAM, 166 MHz
3.3V 128K x 36 pipeline burst synchronous SRAM, 150 MHz
3.3V 128K x 36 pipeline burst synchronous SRAM, 133 MHz
3.3V 128K x 32 pipeline burst synchronous SRAM, 133 MHz
3.3V 128K x 32 pipeline burst synchronous SRAM, 166 MHz
128K X 32 STANDARD SRAM, 4 ns, PQFP100 14 X 20 MM, TQFP-100
128K X 36 STANDARD SRAM, 4 ns, PQFP100 14 X 20 MM, TQFP-100
128K X 32 STANDARD SRAM, 3.8 ns, PQFP100 14 X 20 MM, TQFP-100
128K X 32 STANDARD SRAM, 5 ns, PQFP100 14 X 20 MM, TQFP-100
128K X 36 STANDARD SRAM, 3.8 ns, PQFP100 14 X 20 MM, TQFP-100
128K X 36 STANDARD SRAM, 5 ns, PQFP100 14 X 20 MM, TQFP-100
3.3V 128K x 32/36 pipeline burst synchronous SRAM
3.3V 128K x 32 pipeline burst synchronous SRAM, 150 MHz
3.3V 128K x 32 pipeline burst synchronous SRAM, 100 MHz
3.3V 128K x 36 pipeline burst synchronous SRAM, 100 MHz
|
Alliance Semiconductor, Corp.
|
| GS88118 GS88136 GS88118GT-11IT GS88118GT-11.5IT GS |
512K x 18, 256K x 36 ByteSafe?/a> 8Mb Sync Burst SRAMs
512K x 18, 256K x 36 ByteSafe 8Mb Sync Burst SRAMs
512K x 18, 256K x 36 ByteSafe8Mb Sync Burst SRAMs
8Mb锛?12K x 18Bit) ByteSafe Synchronous Burst SRAM(8M浣??512K x 18浣??ByteSafe??????RAM锛?甫2浣???插?????板?锛?
512K X 18 CACHE SRAM, 11.5 ns, PQFP100 TQFP-100
512K X 18 CACHE SRAM, 11 ns, PQFP100 TQFP-100
8Mb56K x 36Bit)ByteSafe Synchronous Burst SRAM(8M位（256K x 36位）ByteSafe同步静态RAM（带2位脉冲地址计数器）)
8Mb12K x 18Bit) ByteSafe Synchronous Burst SRAM(8M位（512K x 18位）ByteSafe同步静态RAM（带2位脉冲地址计数器）)
|
GSI Technology, Inc.
|
| GS88136BGD-300I GS88132BT-200 |
512K x 18, 256K x 32, 256K x 36 9Mb Sync Burst SRAMs 256K X 36 CACHE SRAM, 5 ns, PBGA165
512K x 18, 256K x 32, 256K x 36 9Mb Sync Burst SRAMs 256K X 32 CACHE SRAM, 6.5 ns, PQFP100
|
GSI Technology, Inc.
|
| GS84032T-166 GS84032B-100 GS84032B-166 GS84032B-15 |
128K X 32 CACHE SRAM, 8 ns, PBGA119
4Mb56K x 18Bit) Synchronous Burst SRAM(4M位（256K x 18位）同步静态RAM（带2位脉冲地址计数器）)
256K x 18, 128K x 32, 128K x 36 4Mb Sync Burst SRAMs
|
GSI Technology
|
| M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
|
Renesas Electronics Corporation.
Renesas Electronics, Corp.
|
| MCM72PB8ML3.5R MCM72PB8ML4 MCM72PB8ML4R MCM72FB8ML |
256K x 72 Bit Burst RAM Multichip Module 256K X 72 CACHE SRAM MODULE, 3.5 ns, PBGA209
256K x 72 Bit Burst RAM Multichip Module 256K X 72 CACHE SRAM MODULE, 4 ns, PBGA209
CAP CER 680PF 100V C0G 0603 256K X 72 CACHE SRAM MODULE, 7.5 ns, PBGA209
|
Motorola, Inc.
Electronic Theatre Controls, Inc.
Motorola Mobility Holdings, Inc.
|
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