| PART |
Description |
Maker |
| ACTS74HMSR ACTS74MS 5962F9671301VCC 5962F9671301VX |
ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14
Radiation Hardened Dual D Flip Flop with Set and Reset
D-Flip Flop, Dual, with Set and Reset, TTL Inputs, Rad-Hard, Advanced Logic, CMOS
|
INTERSIL[Intersil Corporation]
|
| HCTS74KTR HCTS74T HCTS74DTR |
DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS 20-LCCC -55 to 125
Radiation Hardened Dual-D Flip-Flop with
Set and Reset(抗辐射双D触发器（带置位、复位）)
Radiation Hardened Dual-D Flip-Flop with Set and Reset
HCT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14
|
Intersil Corporation
|
| HMC749LC3C11 |
26 GHz, T FLIP-FLOP w/ RESET, PROGRAMMABLE OUTPUT VOLTAGE & POSITIVE SUPPLY
|
Hittite Microwave Corporation
|
| MC74HCT273 MC74HCT273A ON1520 MC74HCT273AN HCT273 |
Octal D Flip-Flop with Common Clock and Reset with LSTTL-Compatible Inputs HCT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20
From old datasheet system
|
Motorola Mobility Holdings, Inc.
Motorola, Inc.
MOTOROLA[Motorola, Inc]
|
| MC74HC174AD ON1373 MC74HC174AN |
Hex D Flip-Flop With Common Clock And Reset High-Performance Silicon-Gate CMOS
Hex D Flip-Flop witth Common Clock and Reset
From old datasheet system
|
Motorola, Inc
|
| 74LV109 74LV109D 74LV109DB 74LV109N 74LV109PW 74LV |
Dual JK flip-flop with set and reset; positive-edge trigger LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
From old datasheet system
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| 74HC107 74HC107PW 74HC107D 74HC107DB 74HC107N 74HC |
Dual JK flip-flop with reset negative-edge trigger
74HC/HCT107; Dual JK flip-flop with reset; negative-edge trigger
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR |
5V Dual Differential PECL to TTL Translator
5V ECL Low Impedance Driver
Dual Type D Master-Slave Flip-Flop
ECL/TTL Clock Driver
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V / 5V ECL ÷4 Divider
Quad 2-Input NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V / 5V Triple ECL Input to LVPECL/PECL Output Translator
|
ON Semiconductor
|
| MC54-74HC175 MC74HC175 MC74HC175D MC74HC175N MC54_ |
From old datasheet system
QUAD D FLLP-FLOP WLTH COMMON CLOCK AND RESET
Quad D Flip-Flop with Common Clock and Reset
|
Motorola, Inc.
ONSEMI[ON Semiconductor]
MOTOROLA[Motorola, Inc]
|
| SY100E131JYTR SY100E131JY SY10E131_06 SY100E131 SY |
4-BIT D FLIP-FLOP
4-BIT D FLIP-FLOP 10E SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PQCC28
|
MICREL[Micrel Semiconductor]
Micrel Semiconductor, Inc.
|
| MC74AC175-D |
Quad D Flip-Flop With Master Reset
|
ON Semiconductor
|
