| PART |
Description |
Maker |
| HDMP-1032A HDMP-1034A |
HDMP-1032A · 1.4 GBd Transmitter Chip with CIMT Encoder/Decoder and Variable Data Rate
HDMP-1034A · 1.4 GBd Receiver Chip with CIMT Encoder/Decoder and Variable Data Rate
Transmitter/Receiver Chip Set
|
Agilent (Hewlett-Packard)
Agilent(Hewlett-Packard)
|
| HDMP-1034A |
HDMP-1034A 路 1.4 GBd Receiver Chip with CIMT Encoder/Decoder and Variable Data Rate
|
AGILENT
|
| K4D26323RA-GC |
1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL Data Sheet
|
Samsung Electronic
|
| K4D26323AA-GL |
1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL Data Sheet
|
Samsung Electronic
|
| KYL-220-24 KYL-220-12 KYL-220-192 KYL-220-96 |
High speed Rate RF Transceiver Data Module
|
SHENZHEN KYL COMMUNICATION EQUIPMENT CO,LTD.
|
| EM423M3284LBA-8FE EM424M3284LBA-75FE EM424M3284LBA |
512Mb (4MBank2) Double DATA RATE SDRAM
512Mb (4MBank32) Double DATA RATE SDRAM
512Mb (4M4Bank2) Double DATA RATE SDRAM
|
Electronic Theatre Controls, Inc.
|
| W9751G6KB-18 W9751G6KB-25 W9751G6KB-3 W9751G6KB25A |
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
| M13L2561616A-2A |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| M14D5121632A-2K |
Internal pipelined double-data-rate architecture; two data access per clock cycle
|
Elite Semiconductor Mem...
|
| K4D26323RA K4D26323RA-GC2A K4D26323RA-GC33 K4D2632 |
1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL
|
SAMSUNG SEMICONDUCTOR CO. LTD.
SAMSUNG[Samsung semiconductor]
Samsung Electronic
|
| ADXRS646-EP |
High Stability, Low Noise Vibration Rejecting Yaw Rate Gyroscope Data Sheet (Rev 0, 10/2012)
|
Analog Devices
|
