| PART |
Description |
Maker |
| 1513 1513SERIES 1513-75Y 1513-135Y 1513-2.5A 1513- |
Delay 50 /-2.5 ns, fixed SIP delay line Td/Tr=5
Delay 80 /-4 ns, fixed SIP delay line Td/Tr=5
Delay 45 /-2.3 ns, fixed SIP delay line Td/Tr=5
Delay 37.5 /-1.9 ns, fixed SIP delay line Td/Tr=5
Delay 22.5 /-1.2 ns, fixed SIP delay line Td/Tr=5
Delay 90 /-4.5 ns, fixed SIP delay line Td/Tr=5
Delay 2.5 /-1 ns, fixed SIP delay line Td/Tr=5
Fixed passive SIP delay line
FIXED SIP DELAY LINE TD/TR = 5 固话SIP延迟线运输署/训练班\u003d 5
Delay 75 /-3.8 ns, fixed SIP delay line Td/Tr=5
Delay 135 /-6.8 ns, fixed SIP delay line Td/Tr=5
Delay 3.5 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 120 /-6 ns, fixed SIP delay line Td/Tr=5
Delay 30 /-1.5 ns, fixed SIP delay line Td/Tr=5
Delay 40 /-2 ns, fixed SIP delay line Td/Tr=5
Delay 25 /-1.3 ns, fixed SIP delay line Td/Tr=5
Delay 60 /-3 ns, fixed SIP delay line Td/Tr=5
Delay 140 /-7 ns, fixed SIP delay line Td/Tr=5
Delay 20 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 5 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 15 /-1 ns, fixed SIP delay line Td/Tr=5
|
Coilcraft, Inc.
Data Delay Devices Inc
|
| ASMP5P23S04A ASM5P23S04AF-1-08-SR ASM5P23S04AF-1-0 |
23S SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
3.3V ‘SpreadTrak?/a> Zero Delay Buffer
3.3V ‘SpreadTrak Zero Delay Buffer
3.3V 隆庐SpreadTrak隆炉 Zero Delay Buffer
|
PulseCore Semiconductor
|
| 1503 1503J 1503-100A 1503-100B 1503-100C 1503-120B |
Max delay 35 ns, Mechanically variable delay line
Max delay 250 ns, Mechanically variable delay line
Max delay 150 ns, Mechanically variable delay line
Max delay 130 ns, Mechanically variable delay line
Max delay 80 ns, Mechanically variable delay line
Max delay 60 ns, Mechanically variable delay line
Max delay 50 ns, Mechanically variable delay line
Max delay 40 ns, Mechanically variable delay line
Max delay 30 ns, Mechanically variable delay line
Max delay 25 ns, Mechanically variable delay line
Max delay 20 ns, Mechanically variable delay line
Max delay 200 ns, Mechanically variable delay line
Max delay 160 ns, Mechanically variable delay line
Max delay 15 ns, Mechanically variable delay line
Max delay 140 ns, Mechanically variable delay line
Max delay 120 ns, Mechanically variable delay line
Max delay 100 ns, Mechanically variable delay line
Mechanically variable passive delay line
|
Data Delay Devices Inc
|
| CY23FS08OXC CY23FS08OXCT CY23FS08OXIT CY23FS0811 C |
Failsafe 2.5 V/3.3 V Zero Delay Buffer
Failsafe™ 2.5V/ 3.3V Zero Delay Buffer 166.7 MHz, OTHER CLOCK GENERATOR, PDSO28
Failsafe?2.5 V/3.3 V Zero Delay Buffer
|
Cypress Semiconductor, Corp.
|
| IDT2309-1HPG IDT2309-1HDCG IDT2309-1DCG IDT2309-1H |
3.3V ZERO DELAY CLOCK BUFFER Phase-Lock Loop Clock Distribution
|
Integrated Device Technology
|
| 1507 1507-100A 1507-100B 1507-100C 1507-150A 1507- |
Delay 50 /-2.5 ns, 10-TAP SIP delay line Td/Tr=5
Delay 300 /-15 ns, 10-TAP SIP delay line Td/Tr=5
Delay 200 /-10 ns, 10-TAP SIP delay line Td/Tr=5
Delay 250 /-13 ns, 10-TAP SIP delay line Td/Tr=5
Delay 150 /-7.5 ns, 10-TAP SIP delay line Td/Tr=5
Delay 100 /-5 ns, 10-TAP SIP delay line Td/Tr=5
Ultra-Low-Power Voltage Detectors and µP Supervisory Circuits 固定10抽头延迟线被动园
Ultra-Low-Power Voltage Detectors and µP Supervisory Circuits
Delay 40 /-2 ns, 10-TAP SIP delay line Td/Tr=5
Delay 500 /-25 ns, 10-TAP SIP delay line Td/Tr=5
Delay 20 /-2 ns, 10-TAP SIP delay line Td/Tr=5
|
Data Delay Devices Inc
|
| ISPPACCLK5610AV-01TN48C ISPPACCLK5610AV-01TN48I IS |
In-System Programmable, Enhanced Zero-Delay, Clock Generator with Universal Fan-Out Buffer
5600 SERIES, PLL BASED CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP100 TQFP-100
5600 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48 TQFP-48
CLOCK GENERATOR, ISP, SMD, TQFP48; Frequency, clock:10MHz; Temp, op. min:0(degree C); Temp, op. max:70(degree C); Pins, No. of:48; Case style:TQFP / 48; Base number:5610; Packaging type:Peel Pack; Voltage, Vcc:3.3V; Temperature, RoHS Compliant: Yes
In-System Programmable, Enhanced Zero-Delay, Clock Generator with Universal Fan-Out Buffer
|
Lattice Semiconductor Corporation
Lattice Semiconductor, Corp.
|
| NB2304AI1DG |
3.3 V Zero Delay Clock Buffer 2304 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
|
ON Semiconductor
|
| IDT2309-1DC IDT2309-1DCI IDT2309 IDT2309-1HPGI IDT |
3.3V ZERO DELAY CLOCK BUFFER 2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
|
INTEGRATED DEVICE TECHNOLOGY INC
Integrated Device Technology, Inc.
IDT[Integrated Device Technology]
|
| 3D7010SERIES 3D7010S-80 3D7010S-90 3D7010S-400 |
300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit 整体0 - TAP在固定延迟线
MONOLITHIC 10-TAP FIXED DELAY LINE
Delay 8 /-1.5 ns, monolithic 10-TAP fixed delay line
Delay 9 /-1.7 ns, monolithic 10-TAP fixed delay line
Delay 40 /-4 ns, monolithic 10-TAP fixed delay line
|
Interpower, Corp.
Data Delay Devices Inc
|
| 2305B-1HPGG 2305B-1HPGGI 2305B-1DCG 2305B-1DCGI 23 |
3.3V ZERO DELAY CLOCK BUFFER
|
Integrated Device Technology
http://
|
| PI6C2405A-1HLIE PI6C2405A-1HWIE PI6C2405A-1LIE |
Zero-Delay Clock Buffer
|
Pericom Semiconductor C...
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