| PART |
Description |
Maker |
| 74F11200 74F112SJ 74F112 74F112PC 74F112SC 74F112S |
From old datasheet system
Dual JK Negative Edge-Triggered Flip-Flop; Package: SOP; No of Pins: 16; Container: Tape & Reel F/FAST SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor, Corp.
|
| SN54LS112A SN54LS112J 74LS112 SN74LS112N SN74LS112 |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
|
MOTOROLA[Motorola, Inc]
MOTOROLA[Motorola Inc]
|
| DV74AC112 |
Dual JK Negative edge-triggered flip-flop
|
AVG Semiconductors(HITEK)
|
| SN54_74LS73A ON2951 |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
From old datasheet system
|
ON Semi
|
| 74LS112 DM74LS112A DM74LS112AN DM74KS112AM |
From old datasheet system
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset/ Clear/ and Complementary Outputs
|
FAIRCHILD[Fairchild Semiconductor]
|
| 74F113 I74F113D I74F113N N74F113D N74F113N 74F113_ |
From old datasheet system
Dual J-K negative edge-triggered flip-flops without reset
|
NXP Semiconductors
PHILIPS[Philips Semiconductors]
|
| 74LS73PC |
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14
|
FAIRCHILD SEMICONDUCTOR CORP
|
| 74ACT11112 |
Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 具有清零和预设功能的双路 J-K 下降沿触发器
|
Linear Technology, Corp.
|
| 54LS76A/BDAJC |
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP14
|
MOTOROLA INC
|
| ACTS112HMSR-02 |
ACT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC16
|
HARRIS SEMICONDUCTOR
|
| 74F114SC 74F114 74F114PC |
双JK负沿触发器与普通时钟和清除拖鞋
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears
From old datasheet system
|
锁存
FAIRCHILD[Fairchild Semiconductor]
|
