| PART |
Description |
Maker |
| MC10H109FNR2 MC10H131 MC100EP140 MC100E155FN MC100 |
Dual 4-5-Input OR/NOR Gate
Dual Type D Master-Slave Flip-Flop
3.3V ECL Phase-Frequency Detector
5V ECL 6-Bit 2:1 Mux Latch
5V ECL Differential Data and Clock D Flip-Flop
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V ECL 1:15 Differential ÷1/÷2 Clock Driver
ECL/TTL Clock Driver
3.3V / 5V 2-Input Differential AND/NAND
5V ECL 2:1 Multiplexer
3.3V / 5V ECL JK Flip Flop
3.3V ECL 1:4 ÷ 1/÷ 2 Clock Fanout Buffer
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator
Dual 2-Bit Adder/Subtractor
|
ON Semiconductor
|
| MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR |
5V Dual Differential PECL to TTL Translator
5V ECL Low Impedance Driver
Dual Type D Master-Slave Flip-Flop
ECL/TTL Clock Driver
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V / 5V ECL ÷4 Divider
Quad 2-Input NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V / 5V Triple ECL Input to LVPECL/PECL Output Translator
|
ON Semiconductor
|
| HDMP-1638 |
Gigabit Ethernet Transceiver Chip with Dual Serial I/O and Differential PECL Clock Inputs(带双路串行I/O和差分PECL时钟输入的千兆位以太网收发器)
HDMP-1638 · 1.25 GBd Transceiver Chip with Dual Serial I/O and Differential PECL Clock Inputs for GbE
|
Agilent (Hewlett-Packard)
|
| MC100LVE210 MC100LVE210FNR2 MC100E210 MC100E210FNR |
Low Voltage Dual 1:4, 1:5 Differential Fanout Buffer 100E SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC28
Low Voltage Dual 1:4, 1:5 Differential Fanout Buffer 100LVE SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC28
Low Voltage Dual 1:4 / 1:5 Differential Fanout Buffer
MARKING DIAGRAM
Low Voltage Dual 1:4 1:5 Differential Fanout Buffer
From old datasheet system
|
ONSEMI[ON Semiconductor]
|
| CAT33C108SI CAT33C108SI-TE13 CAT33C108K-TE13 CAT33 |
Clock Generator for Intel® Alviso Chipset
200-MHz Differential Clock Buffer/Driver 微型导线串行EEPROM
Clock Synthesizer with Differential CPU Outputs 微型导线串行EEPROM
Clock Generator for Intel® Alviso Chipset
Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems
|
Abracon, Corp.
|
| CY2PP3210AI CY2PP3210AIT CY2PP3210 |
Dual 1:5 Differential Clock/Data Fanout Buffer
Dual 1:5 Differential Clock / Data Fanout Buffer
|
CYPRESS[Cypress Semiconductor]
|
| MC100LVEL29DW MC100LVEL2906 MC100LVEL29DWR2G MC100 |
3.3V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset
|
ONSEMI[ON Semiconductor]
|
| PI6C4853111FAE PI6C4853111 PI6C4853111FAEX |
6C SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
2.5V/3.3V 500MHz Low Skew 1-to-10 Differential to LVPECL Fanout Buffer with 2 to 1 Differential Clock Input Mux
|
Pericom Semiconductor Corporation
|
| SI5330A-A00200-GM SI5330A-A00202-GM SI5330F-A00216 |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs
|
Silicon Laboratories
|
| NB4N111KMNR4G NB4N111KMNG |
3.3V Differential In 1:10 Differential Fanout Clock Driver with HCSL Level Output
|
ON Semiconductor
|
| LTC1458L LTC1458 LTC1458CG LTC1458CSW 14588LF LTC1 |
Dual General Purpose LinCMOS(TM) Differential Comparator 8-TSSOP 0 to 70
Dual General Purpose LinCMOS(TM) Differential Comparator 8-SOIC 0 to 70
Dual General Purpose LinCMOS(TM) Differential Comparator 8-PDIP 0 to 70
Dual General Purpose LinCMOS(TM) Differential Comparator 8-SO 0 to 70
Low-Power LinCMOS(TM) Quad Comparator with Totem Pole Output 14-CDIP -55 to 125
Quad 12-Bit Rail-to-Rail Micropower DACs
From old datasheet system
|
Linear Technology Corporation
LINER[Linear Technology]
|
