PART |
Description |
Maker |
74LV107 74LV107D 74LV107DB 74LV107N 74LV107PW 74LV |
CLP SINE LV/LV-A/LVX/H SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 Dual JK flip-flop with reset; negative-edge trigger
|
NXP Semiconductors N.V. PHILIPS[Philips Semiconductors]
|
MC74F112 MC74F112D MC74F112J MC74F112N ON1232 |
1.2 to 5.5 V 10-A, 12-V Input Non-Isolated Wide-Adjust Module 10-DIP MODULE -40 to 85 F/FAST SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP 双JK负边沿触发器 From old datasheet system
|
Motorola Mobility Holdings, Inc. MOTOROLA[Motorola, Inc]
|
IN74AC112 |
Dual J-K Negative-Edge-Triggered Flip-Flop
|
IK Semiconductor
|
SN74LS112D |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
|
Motorola, Inc
|
HD74LS107A HD74LS107AFPEL HD74LS107AP |
Dual J-K Negative-edge-triggered Flip-Flops (with Clear)
|
Renesas Electronics Corporation
|
74F114PC |
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears
|
Fairchild Semiconductor
|
74LS73PC |
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14
|
FAIRCHILD SEMICONDUCTOR CORP
|
54LS76A/BDAJC |
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP14
|
MOTOROLA INC
|
74LVX112SJ 74LVX112 74LVX112M 74LVX112MTC 74LVX112 |
LV/LV-A/LVX/H SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 Low Voltage Dual J-K Flip-Flops with Preset and Clear
|
FAIRCHILD SEMICONDUCTOR CORP FAIRCHILD[Fairchild Semiconductor]
|
CD74HCT73E |
<font color=red>[Old version datasheet]</font> Dual J-K Flip-Flop with Reset Negative-Edge Trigger
|
TI store
|