| PART |
Description |
Maker |
| ACTS74HMSR ACTS74MS 5962F9671301VCC 5962F9671301VX |
ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14
Radiation Hardened Dual D Flip Flop with Set and Reset
D-Flip Flop, Dual, with Set and Reset, TTL Inputs, Rad-Hard, Advanced Logic, CMOS
|
INTERSIL[Intersil Corporation]
|
| HCS109HMSR HCS109KMSR FN2466 HCS109MS HCS109D HCS1 |
Radiation Hardened Dual JK Flip Flop HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Radiation Hardened Dual JK Flip Flop(抗辐射双J-K触发 辐射加固JK触发器拖鞋（抗辐射双JK触发器）
From old datasheet system
Flip Flop, JK, Dual, Rad-Hard, High-Speed, CMOS, Logic
|
Intersil, Corp.
INTERSIL[Intersil Corporation]
|
| MC100EP01 MC10EP445 MC10H172FNR2 MC100EL29 MC100H6 |
3.3V / 5V ECL 4-Input OR/NOR
3.3V / 5VECL 8-Bit Serial/Parallel Converter
Dual Binary 1-4-Decoder (High)
5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
9-Bit TTL-ECL Translator
Quad TTL-ECL Translator
Dual 2-Wide 2-3-Input OR-AND/OR-AND-Invert Gate
3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
5V ECL Voltage Controlled Oscillator
3.3V ECL D-Type Flip-Flop with Set and Reset
Binary to 1-8 Decoder (Low)
Differential -5V ECL To TTL Translator
-3.3V / -5V Triple ECL Input to PECL Output Translator
5V ECL Dual Differential 2:1 Multiplexer
Quad MSTR
5V ECL Quad 4-Input OR/NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
Dual 4-5-Input OR/NOR
|
ON Semiconductor
|
| MC74HC76 MC74HC76D MC74HC76N ON1498 |
From old datasheet system
DUAL JK FLIP-FLOP WITH SER AND RESET
Dual JK Flip-Flop With Set and Reset
|
MOTOROLA[Motorola, Inc]
ON Semi
|
| 74HC74DR2 74HC74DG |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
ON Semiconductor
|
| MM74C74N MM74C74 MM74C74M MM74C74MX |
Dual D Flip-Flop; Package: SOIC; No of Pins: 14; Container: Tape & Reel CMOS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
From old datasheet system
Dual D-Type Flip-Flop
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| 54HC74 |
Dual D Flip-Flop with Set and Reset
|
Motorola Semiconductor
|
| MC74HC112 MC74HC112-13 |
Dual J-K Flip-Flop with Set and Reset
|
ON Semiconductor
|
| IN74HCT109 |
DUAL J-K FLIP-FLOP WITH SET AND RESET
|
INTEGRAL[Integral Corp.]
|
| CD54AC113A CD54ACT112 CD54AC112 CD54ACT113A |
Dual J-K Flip-Flop with Set and Reset
Dual “J-K” Flip-Flop with Set and Reset
Dual “J-K?/a> Flip-Flop with Set and Reset
Dual “J-K Flip-Flop with Set and Reset
|
INTERSIL[Intersil Corporation]
|
| IN74ACT112N IN74ACT112 IN74ACT112D |
DUAL J-K FLIP-FLOP WITH SET AND RESET 双JK触发器与SET和RESET
|
INTEGRAL JOINT STOCK COMPANY
INTEGRAL[Integral Corp.]
|
| CD4027BCN CD4027BCM |
Dual J-K Master/Slave Flip-Flop with Set and Reset
|
Fairchild Semiconductor
|
