| PART |
Description |
Maker |
| 74LV107 74LV107D 74LV107DB 74LV107N 74LV107PW 74LV |
CLP SINE LV/LV-A/LVX/H SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
Dual JK flip-flop with reset; negative-edge trigger
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| T74LS113AD1 T74LS113AC1 T74LS113AM1 T74LS113AB1 |
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14 CERAMIC, DIP-14
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PQCC20 PLASTIC, LCC-20
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 MICRO, SO-14
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14 PLASTIC, DIP-14
|
ST Microelectronics
|
| SN74LS114D SN54LS114J SN74LS114N SN54LS114A SN5474 |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
|
MOTOROLA[Motorola, Inc]
MOTOROLA[Motorola Inc]
|
| IDT74LVC112A 74LVC112A_DS_87847 |
3.3V CMOS DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP
From old datasheet system
|
IDT
|
| 74F113 I74F113D I74F113N N74F113D N74F113N 74F113_ |
From old datasheet system
Dual J-K negative edge-triggered flip-flops without reset
|
NXP Semiconductors
PHILIPS[Philips Semiconductors]
|
| MC74HC107DR2 |
HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
MOTOROLA INC
|
| 74LCX112 74LCX112M 74LCX112MTC 74LCX112SJ 74LCX112 |
Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs
|
FAIRCHILD[Fairchild Semiconductor]
|
| 74HC73 74HC73PW 74HC73D |
Dual JK flip-flop with reset; negative-edge trigger
Dual JK flip-flop with reset; negative-edge trigger
|
NXP Semiconductors
|
| CD74ACT112E |
ACT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
|
HARRIS SEMICONDUCTOR
|
| 74F114SC 74F114 74F114PC |
双JK负沿触发器与普通时钟和清除拖鞋
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears
From old datasheet system
|
锁存
FAIRCHILD[Fairchild Semiconductor]
|
