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  lv-pecl lv-cmos Datasheet PDF File

For lv-pecl lv-cmos Found Datasheets File :: 102    Search Time::2.156ms    
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    VS-700 VS-700-LFF VS-700-LFF-GNN VS700

Vectron International, Inc
ETC[ETC]
Part No. VS-700 VS-700-LFF VS-700-LFF-GNN VS700
OCR Text ...s-rms across 50 kHz to 80 MHz * lv-pecl Configuration with Fast Transition Times * Complementary Outputs * Output Disable Feature * Fully Compatible for Lead Free Assembly Applications PLL circuits for Clock Smoothing and Frequency Tran...
Description VOLTAGE CONTROLLED SAW OSCILLATOR

File Size 468.88K  /  7 Page

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    FAN6550

FAIRCHILD[Fairchild Semiconductor]
Part No. FAN6550
OCR Text ...shiba Processors or backplanes; LV-TTL SDRAM, EDO RAM LV-TTL Symmetric Drive 3.310% VDDQ/2 3.3V 10 REV. 1.0.2 3/11/02 PRODUCT SPECIFICATION FAN6550 Mechanical Dimensions Package: M16 16-Pin SOIC Inches Min. A...
Description 2A DDR Bus Termination Regulator
From old datasheet system

File Size 98.50K  /  12 Page

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    CM8500

List of Unclassifed Manufacturers
ETC[ETC]
Part No. CM8500
OCR Text ...TL, CMOS, Rambus TM ,GTL+, VME, lv-cmos, LV-TTL, and PECL. FEATURES Patent Filed #6,452,366 16 pin PTSSOP and PSOP package Source and sink up to 3A, no heat sink required Peak Current to 6A Integrated Power MOSFETs Output voltage can be...
Description 3A BUS TERMINATOR

File Size 295.61K  /  13 Page

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    ML6554CU ML6554

Fairchild Semiconductor, Corp.
MICRO-LINEAR[Micro Linear Corporation]
Part No. ML6554CU ML6554
OCR Text ...STL, CMOS, RambusTM, GTL+, VME, lv-cmos, LV-TTL, and PECL. FEATURES s s s s Power SOP package Can source and sink up to 3A, no heat sink required Integrated Power MOSFETs Generates termination voltages for SSTL-2 SDRAM, SGRAM, or equ...
Description 3A Bus Termination Regulator 3A条总线终端稳压

File Size 167.29K  /  14 Page

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    ML6554 ML6554IU ML6554CU

Fairchild Semiconductor Corporation
FAIRCHILD[Fairchild Semiconductor]
Part No. ML6554 ML6554IU ML6554CU
OCR Text ...r DDR SDRAM, GTL+, Rambus, VME, LV-TTL, HSTL, PECL and other high speed logic * VREF input available for external voltage divider * Separate voltages for VCCQ and PVDD * Buffered VREF output * VOUT of 3% or less at 3A * Minimum external com...
Description 3A Bus Termination Regulator

File Size 383.45K  /  14 Page

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    EVM646ATF E646 EDGE646 E646ATF

SEMTECH[Semtech Corporation]
Part No. EVM646ATF E646 EDGE646 E646ATF
OCR Text ...y can drive PECL, 3V CMOS, ECL, LV CMOS, GTL, and custom levels by varying LOW LEVEL and HIGH LEVEL. For example, should a 3V swing be desired, HIGH LEVEL could be connected to a 3.0V power supply. Notice that HIGH LEVEL and LOW LEVEL provi...
Description Pin Electronics Driver, Window Comparator, and Switch Matrix
Pin Electronics Driver/ Window Comparator/ and Switch Matrix

File Size 133.86K  /  13 Page

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    ML6553 ML6553CS-1

FAIRCHILD[Fairchild Semiconductor]
Part No. ML6553 ML6553CS-1
OCR Text ...s for GTL+, DDR, RambusTM, VME, LV-TTL, PECL and other high speed logic * VL regulated to within 3% at 800mA * Minimum external components. Requires no feedback compensation * Fixed frequency operation for easier system integration * Lower ...
Description Bus Termination Regulator

File Size 113.70K  /  7 Page

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    NB4N507A

List of Unclassifed Manufacturers
ONSEMI
ETC
Part No. NB4N507A
OCR Text ...onnect PECL Output PECL Output (LV)CMOS/(LV)TTL Input Tri-Level Input Crystal Input Non-inverted differential PECL clock output. Inverted differential PECL clock output. Output Enable for the CLKOUT/CLKOUT Outputs. Outputs are enabled when ...
Description 3.3V/5V, 50 MHz to 200 MHz PECL Clock Synthesizer

File Size 127.22K  /  7 Page

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    CY22394 CY22393 CY22395 CY22395ZC-XXXT CY22395ZI-XXXT CY22393ZC-XXXT CY22394ZC-XXXT CY22393ZI-XXX CY22394ZI-XXX CY22394Z

Cypress Semiconductor, Corp.
Cypress Semiconductor Corp.
Part No. CY22394 CY22393 CY22395 CY22395ZC-XXXT CY22395ZI-XXXT CY22393ZC-XXXT CY22394ZC-XXXT CY22393ZI-XXX CY22394ZI-XXX CY22394ZI-XXXT CY22393ZI-XXXT CY22394ZXC-XXXT CY22393FXCT CY22393FCT CY22393FIT
OCR Text ...put D; LCLKD referenced to LVDD LV PECL Output[1] Configurable clock output E; LCLKE referenced to LVDD LV PECL Output[1] Configurable clock output B; LCLKB referenced to LVDD Description Configurable clock output C Note: 1. LVPECL outpu...
Description -bit AVR Microcontroller with 8K Bytes In- System Programmable Flash 375 MHz, OTHER CLOCK GENERATOR, PDSO16
-bit AVR Microcontroller with 8K Bytes In- System Programmable Flash 166 MHz, OTHER CLOCK GENERATOR, PDSO16
-bit AVR Microcontroller with 8K Bytes In- System Programmable Flash 400 MHz, OTHER CLOCK GENERATOR, PDSO16
-bit AVR Microcontroller with 8K Bytes In- System Programmable Flash 200 MHz, OTHER CLOCK GENERATOR, PDSO16
CONNECTOR ACCESSORY
(CY22393 / CY22394 / CY22395) Three-PLL Serial-Programmable Flash-Programmable Clock Generator

File Size 232.30K  /  19 Page

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