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Cypress Semiconductor Corp.
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| Part No. |
CY7C1333 7C1333 CY7C1333-66AC CY7C1333-50AC
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| OCR Text |
...chip enable inputs or WE. WE is latched at the beginning of a burst cycle. Therefore, the type of access (Read or Write) is maintained throughout the burst sequence. Single Write Accesses A write access is initiated when the following condi... |
| Description |
64Kx32 Flow-Thru SRAM with NoBL Architecture(B>NoBL结构4Kx32流通式 SRAM) 64Kx32 Flow-Thru SRAM with NoBL⑩ Architecture From old datasheet system
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| File Size |
179.79K /
12 Page |
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latched registered pass-thru Found Datasheets File :: 19 Search Time::1.203ms Page :: | <1> | 2 | |
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