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For edges Found Datasheets File :: 10539    Search Time::1.187ms    
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    VPC3201C

Micronas
Part No. VPC3201C
OCR Text ...the comb strength on horizontal edges. it determines the amount of the remaining cross-luminance and the sharpness on edges respec- tively. as hdg increases, the comb strength, e. g. cross luminance reduction and sharpness, increases. vdg ...
Description Video processor (50Hz/single scan)

File Size 757.11K  /  48 Page

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Part No. MT8VDDT1664AG-202A1
OCR Text ...nput data is registered on both edges of dqs, and output data is referenced to both edges of dqs, as well as to both edges of ck0. read and write accesses to the ddr sdram modules are burst oriented; accesses start at a selected location an...
Description 16M X 64 DDR DRAM MODULE, 0.8 ns, DMA184

File Size 403.49K  /  23 Page

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    Intersil, Corp.
INTERSIL[Intersil Corporation]
Part No. EL5427CRZ-T7 EL5127 EL5127CY EL5127CY-T13 EL5127CY-T7 EL5127CYZ EL5127CYZ-T13 EL5127CYZ-T7 EL5227CL EL5227CL-T13 EL5227CL-T7 EL5227CLZ EL5227CLZ-T13 EL5227CLZ-T7 EL5227CR EL5227CR-T13 EL5227CR-T7 EL5227CRZ EL5227CRZ-T13 EL5227CRZ-T7 EL5327CL EL5327CL-T13 EL5327CL-T7 EL5327CLZ EL5327CLZ-T13 EL5327CLZ-T7 EL5327CR EL5327CR-T13 EL5327CR-T7 EL5327CRZ EL5327CRZ-T13 EL5327CRZ-T7 EL5427CL EL5427CL-T13 EL5427CL-T7 EL5427CLZ EL5427CLZ-T13 EL5427CLZ-T7 EL5427CR EL5427CR-T13 EL5427CR-T7 EL5427CRZ EL5427CRZ-T13
OCR Text ... measured on rising and falling edges. Slew Rate (Note 3) Settling to +0.1% (AV = +1) -3dB Bandwidth Channel Separation -4.0V VOUT 4.0V, 20% to 80% (AV = +1), VO = 2V step RL = 10k, CL = 10pF f = 100kHz 0.9 2.2 900 2.5 75 V/s ns MHz dB 55...
Description 2.5MHz 4, 8, 10 & 12 Channel Rail-to-Rail Buffers 12 BUFFER AMPLIFIER, QCC32
2.5MHz 4, 8, 10 & 12 Channel Rail-to-Rail Buffers OCTAL BUFFER AMPLIFIER, QCC24
2.5MHz 4, 8, 10 & 12 Channel Rail-to-Rail Buffers QUAD BUFFER AMPLIFIER, PDSO10
2.5MHz 4, 8, 10 & 12 Channel Rail-to-Rail Buffers

File Size 255.12K  /  12 Page

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    ETRON[Etron Technology, Inc.]
Part No. EM637327TQ-8 EM637327 EM637327Q-5 EM637327Q-6 EM637327Q-7 EM637327Q-8 EM637327TQ-5 EM637327TQ-6 EM637327TQ-7
OCR Text ... and is latched at the positive edges of CLK. When RAS# and CS# are asserted "LOW" and CAS# is asserted "HIGH," either the BankActivate command or the Precharge command is selected by the WE# signal. When the WE# is asserted "HIGH," the Ban...
Description 1Mega x 32 SGRAM

File Size 1,160.42K  /  78 Page

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    HYMD564646AXX

Hynix Semiconductor
Part No. HYMD564646AXX
OCR Text ...nced to both rising and falling edges of diff erential clock inputs. while all addresses and control inputs are latched on the rising edges of the clock, data, data st robes and write data masks inputs are sampled on both ris- ing and falli...
Description Unbuffered DDR SDRAM DIMM

File Size 258.99K  /  16 Page

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    HYNIX[Hynix Semiconductor]
Hynix Semiconductor Inc.
Hynix Semiconductor, Inc.
Part No. HYMP112S64MP8-E4 HYMP112S64LMP8-C4 HYMP112S64LMP8-C5 HYMP112S64LMP8-E3 HYMP112S64LMP8-E4 HYMP112S64MP8 HYMP112S64MP8-C4 HYMP112S64MP8-C5 HYMP112S64MP8-E3
OCR Text ...nced to both rising and falling edges of differential clock inputs. While all addresses and control inputs are latched on the rising edges of the clock, Data, Data strobes and Write data masks inputs are sampled on both rising and falling e...
Description    DDR2 SDRAM SO-DIMM
SCREW LOCKS FEMALE SETS
SCREW LOCKS MALE 128M X 64 DDR DRAM MODULE, 0.5 ns, ZMA200

File Size 398.36K  /  17 Page

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    ICST[Integrated Circuit Systems]
Part No. ICS527R-02T ICS527-02 ICS527R-02 ICS527R-02I ICS527R-02IT
OCR Text ...indicates when the rising clock edges are aligned with zero skew. Using Phase-Locked Loop (PLL) techniques, the device accepts an input clock up to 200 MHz and produces an output clock up to 160 MHz. The ICS527-02 aligns rising edges on PEC...
Description Clock Slicer User Configurable PECL Input Zero Delay Buffer

File Size 104.54K  /  8 Page

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    Integrated Circuit Syst...
ICST[Integrated Circuit Systems]
Part No. ICS570MT ICS570 ICS570A ICS570AI ICS570AILF ICS570AILFT ICS570AIT ICS570ALF ICS570ALFT ICS570AT ICS570B ICS570BI ICS570BILF ICS570BILFT ICS570BIT ICS570BLF ICS570BLFT ICS570BT ICS570M ICS570MI ICS570MIT
OCR Text ...ut clock aligns with the rising edges of both output clocks, giving the appearance of no delay through the device. There are two outputs on the chip, one being a low-skew divide by two of the other output. The device incorporates an all-chi...
Description Multiplier and Zero Delay Buffer

File Size 89.80K  /  9 Page

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    MSM65344A

OKI[OKI electronic componets]
Part No. MSM65344A
OCR Text ...m rising edge/falling edge/both edges With sampling circuit for noise prevention 11 sources * Minimum instruction execution time * CPU core * General memory space * Local memory space * LCD driver * I/O port Input-output port Input port ...
Description 8-Bit Microcontroller with A/D Converter (with LCD Driver)

File Size 123.45K  /  16 Page

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