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  ecl lvpecl lvds Datasheet PDF File

For ecl lvpecl lvds Found Datasheets File :: 338    Search Time::1.204ms    
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    C1310 C131007

Vectron International, Inc
Part No. C1310 C131007
OCR Text ...hz 0. 608 ps ( 400 mhz; p ecl output) frequency range [h z] jitter [ps rms] 12khz to 20mhz 0. 1 40 ps c1310 pxo vectron international www.vectron.com v. 2007 - 03 - 09 page 5 of 7 vectr...
Description Typical Applications

File Size 212.15K  /  7 Page

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    SY89825U SY89825UHI

Micrel Semiconductor,Inc.
MICREL[Micrel Semiconductor]
Part No. SY89825U SY89825UHI
OCR Text ...put to 22 LVPecl outputs s 100K ecl compatible outputs s lvds input includes 100 termination s Guaranteed AC parameters over voltage: DESCRIPTION The SY89825U is a High Performance Bus Clock Driver with 22 differential LVPecl output pai...
Description 2.5/3.3V 1:22 HIGH-PERFORMANCE / LOW-VOLTAGE Pecl BUS CLOCK DRIVER & TRANSLATOR w/ INTERNAL TERMINATION
2.5/3.3V 1:22 HIGH-PERFORMANCE, LOW-VOLTAGE Pecl BUS CLOCK DRIVER & TRANSLATOR w/ INTERNAL TERMINATION

File Size 58.35K  /  8 Page

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    SY89825UHY SY89825UHYTR SY89825UHITR SY89825U_07 SY89825U SY89825UHI SY89825U07

MICREL[Micrel Semiconductor]
Part No. SY89825UHY SY89825UHYTR SY89825UHITR SY89825U_07 SY89825U SY89825UHI SY89825U07
OCR Text ...put to 22 LVPecl outputs s 100K ecl compatible outputs s lvds input includes 100 termination s Guaranteed AC parameters over voltage: Precision Edge(R) DESCRIPTION The SY89825U is a High Performance Bus Clock Driver with 22 different...
Description 2.5/3.3V 1:22 HIGH-PERFORMANCE, LOW-VOLTAGE Pecl BUS CLOCK DRIVER & TRANSLATOR w/ INTERNAL TERMINATION

File Size 61.12K  /  9 Page

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    PO100HSTL50A PO100HSTL50ASR PO100HSTL50ASU

Potato Semiconductor Corporation
Part No. PO100HSTL50A PO100HSTL50ASR PO100HSTL50ASU
OCR Text ...aveforms FIGURE 1. lvds/ Pecl/ ecl/ HSTL /DIFFERENTIAL INPUT WAVEFORM DEFINITIONS VCC VCC= 3.3V VIH VPP VIL VEE=0.0V VEE VPP RANGE 0V-VCC ...LVPecl/HSTL to LVTTL Translator Dual LVTTL/LVCMOS to Differential HSTL Translator 04/19/09 Drive...
Description Dual Differential lvds/LVPecl/HSTL to LVTTL Translator Dual LVTTL/LVCMOS to Differential HSTL Translator

File Size 684.99K  /  8 Page

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    PO100HSTL23A PO100HSTL23ASR PO100HSTL23ASU PO100HSTL23ATR PO100HSTL23ATU

Potato Semiconductor Corporation
Part No. PO100HSTL23A PO100HSTL23ASR PO100HSTL23ASU PO100HSTL23ATR PO100HSTL23ATU
OCR Text ...aveforms FIGURE 1. lvds/ Pecl/ ecl/ HSTL /DIFFERENTIAL INPUT WAVEFORM DEFINITIONS VCC VCC= 3.3V VIH VPP VIL VEE=0.0V VEE VPP RANGE 0V-VCC ...LVPecl/HSTL to LVTTL Translator 02/13/07 Packaging Mechanical Drawing: 8 pin SOIC 8 .0099 .0196...
Description Dual Differential lvds/LVPecl/HSTL to LVTTL Translator

File Size 519.01K  /  6 Page

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    MICREL[Micrel Semiconductor]
Part No. SY89874UMITR SY89874U_07 SY89874U SY89874UMG SY89874UMGTR SY89874UMI
OCR Text ................. -0.5V to VCC+0.3 ecl Output Current (IOUT) Continuous ......................................................... 50mA Surge .....LVPecl DC ELECTRICAL CHARACTERISTICS(Notes 1, 2) VCC = 3.3V 10% or 2.5V 5%; TA = -40C to +85C, RL =...
Description    2.5GHz ANY DIFF. IN-TO-LVPecl PROGRAMMABLE CLOCK DIVIDER/FANOUT BUFFER WITH INTERNAL TERMINATION

File Size 107.59K  /  10 Page

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    PO100HSTL179A PO100HSTL179ASR PO100HSTL179ASU

Potato Semiconductor Corporation
Part No. PO100HSTL179A PO100HSTL179ASR PO100HSTL179ASU
OCR Text ...aveforms FIGURE 1. lvds/ Pecl/ ecl/ HSTL /DIFFERENTIAL INPUT WAVEFORM DEFINITIONS VCC VCC= 3.3V VIH VPP VIL VEE=0.0V VEE VPP RANGE 0V-VCC ...LVPecl/HSTL to LVTTL Translator LVTTL/LVCMOS to Differential HSTL Translator 04/26/09 Driver Swi...
Description Differential lvds/LVPecl/HSTL to LVTTL Translator LVTTL/LVCMOS to Differential HSTL Translator

File Size 688.25K  /  8 Page

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    NB7L32M NB7L32MMNG NB7L32MMNR2G

ONSEMI[ON Semiconductor]
Part No. NB7L32M NB7L32MMNG NB7L32MMNR2G
OCR Text ...ors and accept LVPecl (Positive ecl), CML, or lvds. The high frequency reset pin is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the reset allows for the synchronization of multiple NB7L32M...
Description 2.5V/3.3V, 14GHz 梅2 Clock Divider w/CML Output and Internal Termination(w/CML杈??????ㄧ?绔??2.5V/3.3V, 14GHz 梅2?堕??????
2.5V/3.3V, 14GHz ÷2 Clock Divider w/CML Output and Internal Termination(w/CML输出和内部终端,2.5V/3.3V, 14GHz ÷2时钟分频
From old datasheet system
2.5V/3.3V, 14GHz ±2 Clock Divider w/CML Output and Internal Termination

File Size 171.32K  /  11 Page

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For ecl lvpecl lvds Found Datasheets File :: 338    Search Time::1.204ms    
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