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Cypress Semiconductor Corp. SRAM Cypress Semiconductor, Corp.
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Part No. |
CY7C1470V25 CY7C1470V25-167ACES CY7C1470V25-167AXC CY7C1470V25-167AXCES CY7C1470V25-167BZC CY7C1470V25-167BZCES CY7C1470V25-167BZXC CY7C1470V25-200ACES CY7C1470V25-200AXC CY7C1470V25-200AXCES CY7C1470V25-200BZC CY7C1470V25-200BZCES CY7C1470V25-200BZXC CY7C1470V25-250AXC CY7C1470V25-250BZC CY7C1470V25-250BZXC CY7C1472V25-250AXC CY7C1472V25-250BZXC CY7C1474V25-250BGXC CY7C1472V25-250BZC CY7C1474V25-250BGC CY7C1474V25-167BGCES CY7C1472V25-167BZCES CY7C1472V25-200ACES CY7C1472V25-200AXCES CY7C1472V25-200BZCES CY7C1472V25-167AXCES CY7C1474V25-200BGXC CY7C1474V25-200BGCES CY7C1472V25 CY7C1472V25-167AXC CY7C1472V25-167BZXC CY7C1472V25-200BZXC CY7C1474V25-200BGC
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Description |
72-Mbit(2M x 36/4M x 18/1M x 72) pipelined SRAM with NoBL?/a> Architecture 72-Mbit(2M x 36/4M x 18/1M x 72) pipelined SRAM with NoBL Architecture 72-Mbit(2M x 36/4M x 18/1M x 72) pipelined SRAM with NoBL(TM) Architecture ECONOLINE: RQS & RQD - 1kVDC Isolation- Internal SMD Construction- UL94V-0 Package Material- Toroidal Magnetics- Efficiency to 80% 72-Mbit(2M x 36/4M x 18/1M x 72) pipelined SRAM with NoBLArchitecture 4M X 18 ZBT SRAM, 3.4 ns, PQFP100 72-Mbit(2M x 36/4M x 18/1M x 72) pipelined SRAM with NoBLArchitecture 4M X 18 ZBT SRAM, 3.4 ns, PBGA165 72-Mbit(2M x 36/4M x 18/1M x 72) pipelined SRAM with NoBLArchitecture 4M X 18 ZBT SRAM, 3 ns, PBGA165 72-Mbit(2M x 36/4M x 18/1M x 72) pipelined SRAM with NoBLArchitecture 1M X 72 ZBT SRAM, 3 ns, PBGA209 ECONOLINE: RQS & RQD - 1kVDC Isolation- Internal SMD Construction- UL94V-0 Package Material- Toroidal Magnetics- Efficiency to 80% 2M X 36 ZBT SRAM, 3.4 ns, PBGA165
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File Size |
382.31K /
27 Page |
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it Online |
Download Datasheet
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Part No. |
CAT64LC20J CAT64LC40J CAT64LC10PI CAT64LC40SA CAT64LC40SI CAT64LC20SI CAT64LC20JI CAT64LC20PI
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Description |
18-Mbit (512K x 36/1Mbit x 18) pipelined Register-Register Late Write 36-Mbit DDR-II SRAM 2-Word Burst Architecture 9-Mbit QDR- II SRAM 2-Word Burst Architecture 36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 36-Mbit (1M x 36/2M x 18/512K x 72) pipelined SRAM with NoBL Architecture 36 Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL Architecture SPI Serial EEPROM 4-Mbit (128K x 36) pipelined Sync SRAM 9-Mbit (256K x 36/512K x 18) pipelined SRAM
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File Size |
87.91K /
9 Page |
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it Online |
Download Datasheet
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Price and Availability
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