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ORing Industrial Networ...
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| Part No. |
IGS-9122GPM
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| OCR Text |
...support lldp protocol ? support dual power inputs for power redundancy ? din-rail enabled and fan-less design igs-9122gpm is din-rail modular managed redundant ring ethernet switch with 12x10/100/1000base-t(x) and 2x100/1000base-x sfp ports... |
| Description |
modular managed Gigabit Ethernet switch
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| File Size |
2,361.83K /
6 Page |
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TI store
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| Part No. |
66AK2G12ABY100 X66AK2G12ABY100
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| OCR Text |
... ? up to two usb 2.0 high-speed dual-role ports with integrated phys, support: ? dual-role-device (drd) capability with: ? usb 2.0 periphera...protocol ? bit rates up to 1 mbps ? dual clock source ? ecc protection for message ram ? one media l... |
| Description |
<font color=red>[Old version datasheet]</font> Multicore DSP ARM KeyStone II System-on-Chip (SoC)
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| File Size |
2,308.63K /
233 Page |
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it Online |
Download Datasheet |
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Freescale Semiconductor...
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| Part No. |
MPC8306S MPC8306SEC
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| OCR Text |
...1 in struction and data caches, dual integer units, and on-chip memory management units (mmus). the mpc8306s also includes two dma engine...protocol s upport is provided by the main workho rses of the device?the unified communication contr... |
| Description |
PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications
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| File Size |
448.03K /
70 Page |
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it Online |
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Sony, Corp.
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| Part No. |
CXK77B3640GB
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| OCR Text |
...ster-latch; register-flow thru; dual clock ? single +3.3v power supply: 3.3v 5% ? dedicated output supply voltage: v ddq (1.5v typical) ...protocol - late (delayed) write (lw), are supported, providing a flexible, high-performance user int... |
| Description |
4Mb Late Write HSTL High Speed Synchronous SRAM (128K x 36Bit)(4M位、写延迟、高速逻辑收发（HSTL）、高速同步静态RAM (128K x 36) 4Mb的后写入HSTL高速同步SRAM28K的x 36Bit）（4分位，写延迟，高速逻辑收发（HSTL），高速同步静态随机存储器28K的36位）
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| File Size |
253.94K /
27 Page |
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it Online |
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