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  divisor Datasheet PDF File

For divisor Found Datasheets File :: 608    Search Time::1.172ms    
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    HSP50415 HSP50415VI FN4559

INTERSIL[Intersil Corporation]
Part No. HSP50415 HSP50415VI FN4559
OCR Text ...ncy input Fscale=loop bandwidth divisor input Pm=loop phase margin input (degrees) Component calculation formulas: C1=(Fvcogain*Icp)/(wo*wo*sqrt(kk)) C2=kk*C1 R1=1/sqrt(Fvcogain*Icp*C1*sqrt(C2/C1)) Where: Fvcogain=231000000/APLLvcodivider I...
Description From old datasheet system
Wideband Programmable Modulator (WPM)

File Size 227.10K  /  29 Page

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    ICS82C404 ICS82C404M ICS82C404N AV82C404N AV82C404M

ICST[Integrated Circuit Systems]
Part No. ICS82C404 ICS82C404M ICS82C404N AV82C404N AV82C404M
OCR Text ...lock Register 3 Memory Register divisor for Power-down mode Control Register 0 1 1 1 1 1 1 1 x 0 1 1 1 1 1 1 x x x x 0 1 x x VCLK Selection OE PD EXTSEL FPMODE SEL1 SEL0 x x 1 1 1 1 1 0 x x 0 0 1 1 1 x x x 0 1 0 x 1 x VCLK Tristate Forced H...
Description Dual Programmable Graphics Frequency Generator

File Size 609.81K  /  13 Page

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    PM4314 PM4314-RI

PMC-Sierra, Inc
Part No. PM4314 PM4314-RI
OCR Text ... AND 0DDH: DJAT REFERENCE CLOCK divisor (N1) CONTROL ...................................................................... 86 REGISTERS 01EH, 05EH, 09EH AND 0DEH: DJAT OUTPUT CLOCK divisor (N2) CONTROL ........................................
Description QUAD T1/E1 LINE INTERFACE DEVICE

File Size 813.47K  /  170 Page

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    SCN2661 SCN2661AC1A28 SCN2661AC1N28 SCN2661BA1F28 SCN2661BC1A28 SCN2661BC1F28 SCN2661BC1N28 SCN2661CA1F28 SCN2661CC1A28

PHILIPS[Philips Semiconductors]
NXP Semiconductors N.V.
Part No. SCN2661 SCN2661AC1A28 SCN2661AC1N28 SCN2661BA1F28 SCN2661BC1A28 SCN2661BC1F28 SCN2661BC1N28 SCN2661CA1F28 SCN2661CC1A28 SCN2661CC1F28 SCN2661CC1N28 SCN68661 SCN2661BC1A28-T
OCR Text ...- -- -0.19 -0.26 -- -- -- -- -- divisor 6752 6144 4096 2793 2284 2048 1024 512 256 171 154 128 64 32 16 8 BAUD RATE 50 75 110 134.5 150 200 300 600 1050 1200 1800 2000 2400 4800 9600 19200 divisor 6144 4096 2793 2284 2048 1536 1024 512 292 ...
Description (SCN2661 / SCN68661) Enhanced programmable communications interface EPCI
Enhanced programmable communications interface EPCI 1 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, PQCC28
Enhanced programmable communications interface EPCI 1 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, PDIP28
SM Series Subminiature Basic Switch, Single Pole Double Throw (SPDT), 250 Vac, 5 A, Pin Plunger Actuator, Solder Termination 1 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, CDIP28

File Size 123.07K  /  19 Page

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    SP5054 SP5054KGDPAS SP5054SKGMPAS

Mitel Semiconductor
MITEL[Mitel Networks Corporation]
Mitel Networks, Corp.
Part No. SP5054 SP5054KGDPAS SP5054SKGMPAS
OCR Text ...der with the required 14/15 bit divisor word. The output of this divider, FPD, is fed to the phase comparator where it is compared in phase and frequency domain to the internally generated comparison frequency, FCOMP. FCOMP is obtained by d...
Description 2.6GHz 3-Wire BUS Controlled Synthesiser 2.6GHz线总线控制合成

File Size 278.28K  /  9 Page

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    Cypress
Part No. ICD2061A
OCR Text ...ogic Block Diagram Powerdown divisor MCLKOUT f(REF) XTALIN XTALOUT Reference Frequency VCLK PLL VCLKOUT 2:1 Mux MCLK PLL 2:1 Mux (Typically 14.31818 MHz Xtal) FEATCLK PWRDWN INTCLK S0/CLK S1/DATA Decode Logic 6 5 Serial Program ...
Description Dual Programmable Graphics Clock Generator
From old datasheet system

File Size 196.53K  /  15 Page

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    Sanyo Electric Co.,Ltd.
Sanyo Semiconductor Corp
SANYO[Sanyo Semicon Device]
Part No. LC7218M LC7218 LC7218JM
OCR Text ...swallow counter. * Although the divisor setting is in the range 256 to 65,536, the actual divisor will be twice the set value due to the presence of the internal divide-by-two prescaler. * AMIN is selected when DV in the serial input data i...
Description From old datasheet system
Analog IC - Datasheet Reference
CMOS LSI
PLL Frequency Synthesizer for Electronic Tuning in AV Systems

File Size 262.29K  /  16 Page

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    Zarlink
Part No. SP5024
OCR Text ...der with the required 14/15 bit divisor word. The output of this divider, FPD, is fed to the phase comparator where it is compared in phase and frequency domain to the internally generated comparison frequency, FCOMP. The FCOMP is obtained ...
Description 3-Wire Bus Controlled Synthesiser

File Size 172.93K  /  7 Page

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    EI16C552 16C552

IMP[IMP, Inc]
Part No. EI16C552 16C552
OCR Text ...enerator divides CLK input by a divisor between 1 and (216 -1) Tri-State(R) TTL drive capability for bidirectional data bus and control bus on each channel 16 byte FIFO for receiver as well as for trans mitter. Advanced CMOS low power techn...
Description Dual FIFO UART and Parallel Port

File Size 21.45K  /  2 Page

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For divisor Found Datasheets File :: 608    Search Time::1.172ms    
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