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For bit-cell Found Datasheets File :: 10517    Search Time::5.235ms    
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    CY7C9536B CY7C9536B-BLC CY7C9536B-BLI

Cypress Semiconductor
Part No. CY7C9536B CY7C9536B-BLC CY7C9536B-BLI
OCR Text ...A level 3 interface[14,15] * 16-bit/32-bit host CPU interface bus * JTAG and boundary scan * Glueless interface with Cypress CYS25G0101DX OC...cell. In case of packets, the interface can be programmed as OIF-SPI level 3 Document #: 38-02078 Re...
Description OC-48/STM-16 Framer with VC - POSIC2GVC⑩

File Size 447.41K  /  46 Page

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    CY7C9537B CY7C9537B-BLC CY7C9537B-BLI

Cypress Semiconductor
Part No. CY7C9537B CY7C9537B-BLC CY7C9537B-BLI
OCR Text ...el 3 interface [15,16] * 16-bit/32-bit host CPU interface bus * JTAG and boundary scan * Glue-less interface with Cypress CYS25G0101DX O...cell as programmed. The packet/cell is then transferred to the link layer device, through the System...
Description OC-48/STM-16 Framer-POSIC2G

File Size 400.19K  /  43 Page

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    CY7C9538 CY7C9538-BLC CY7C9538-BLI

Cypress Semiconductor
Part No. CY7C9538 CY7C9538-BLC CY7C9538-BLI
OCR Text ...A level 3 interface[14,15] * 16-bit/32-bit host CPU interface bus * JTAG and boundary scan * Glueless interface with Cypress CYS25G0101DX OC...cell. In case of packets, the interface can be programmed as OIF-SPI level 3 or HBST operations. In ...
Description OC-48/STM-16 Framer with Reconfigurable VC-POSIC2GVC-R

File Size 448.25K  /  46 Page

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    IDT77V1253 IDT77V1253L25PGI

Integrated Device Technology
Part No. IDT77V1253 IDT77V1253L25PGI
OCR Text ...ble as one of three options: 16-bit UTOPIA Level 2, 8-bit UTOPIA Level 1 Multi-PHY, or triple 4-bit DPI (Data Path Interface). The IDT77V125...Cell FIFO Scrambler/ Descrambler 5B/4B Encoding/ Decoding P/S and S/P NRZI Clock/Data Recovery + ...
Description TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS

File Size 448.04K  /  44 Page

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    IDT77V1264L200 IDT77V1264L200PGI

Integrated Device Technology
Part No. IDT77V1264L200 IDT77V1264L200PGI
OCR Text ...ace is selectable as either: 16-bit UTOPIA Level 2, 8-bit UTOPIA Level 1 Multi-PHY, or quadruple 4-bit DPI (Data Path Interface). The IDT77V...Cell Transmit and Receive FIFOs LED Interface for status signalling Supports UTP Category 3 and 5 ph...
Description Quad Port PHY (Physical Layer) for 25.6, 51.2, and 204.8 Mbps ATM Networks and Backplane Applications

File Size 388.13K  /  49 Page

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    Electronic Theatre Controls, Inc.
Part No. ES29BDS400D ES29F320D
OCR Text ...he same time, a lock indicator bit ( dq7 ) is permanently set to a 1 if the part is factory- locked, or set to 0 if it is customer-lockabl...cell array in the device with the same way as used in other eprom or flash devices. general product ...
Description 32Mbit(4M x 8/2M x 16) CMOS 3.0 Volt-only, Boot Sector Flash Memory 32兆(4米8/2M × 16),3.0伏的CMOS只,引导扇区闪存

File Size 660.31K  /  58 Page

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    C8051F912-GU C8051F901-GU C8051F901-GM

Silicon Laboratories
Part No. C8051F912-GU C8051F901-GU C8051F901-GM
OCR Text .../pmu reset c2d c2ck/rst wake 12-bit adc a m u x temp sensor external vref internal vref vdd xtal2 low power 20 mhz oscillator 6-bit ire...cell mode supports 0.9?3.6 v operation; bypass feature automatically shut s off the dc-dc convert...
Description Ultra-Low Power, High-Performance MCU

File Size 52.82K  /  3 Page

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    Intersil, Corp.
Part No. ISL9206EVAL1
OCR Text ...authentication scheme using 32-bit challenge code and 8-bit authentication code ? fast and flexible authentic ation process. multi-pass au...cell li-ion/li-poly and 3-cell series nimh battery packs (2.6v ~ 4.8v ope ration), or powered by th...
Description FlexiHash For Battery Authentication FlexiHash对于电池认证

File Size 355.45K  /  16 Page

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