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Mitsubishi Electric Corporation
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| Part No. |
MH32S64PFJ-7L MH32S64PFJ-6L
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| OCR Text |
...dustry standard EEPROM in TSSOP 144-pin (72-pin dual in-line package) single 3.3V0.3V power supply Fully synchronous operation referenced to...WORD BY 64-BIT)SynchronousDRAM
DESCRIPTION
The MH32S64PFJ is 33554432 - word by 64-bit Synchrono... |
| Description |
2147483648-BIT (33554432 - WORD BY 64-BIT)SynchronousDRAM
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| File Size |
729.99K /
55 Page |
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Mitsubishi Electric Corporation
Mitsubishi Electric, Corp.
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| Part No. |
MH32S64PFJ-6L MH32S64PFJ-7
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| OCR Text |
...dustry standard EEPROM in TSSOP 144-pin (72-pin dual in-line package) single 3.3V0.3V power supply Fully synchronous operation referenced to...WORD BY 64-BIT)SynchronousDRAM
DESCRIPTION
The MH32S64PFJ is 33554432 - word by 64-bit Synchrono... |
| Description |
KPT 10C 10#20 SKT PLUG
2147483648-BIT (33554432 - WORD BY 64-BIT)SynchronousDRAM 2147483648位（33554432 -文字4位）SynchronousDRAM
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| File Size |
702.36K /
55 Page |
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it Online |
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Applied Micro Circuits Corp.
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| Part No. |
S3043
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| OCR Text |
...e format for STS-48 consists of 144 transport overhead bytes followed by Synchronous Payload Envelope (SPE) bytes. This pattern of 144 overh...word, aligned to the PICLK parallel input clock. PIN[15] is the most significant bit (corresponding ... |
| Description |
SONET/SDH/ATM OC-48 16:1 Transmitter(带片上高频锁相环6 SONET/SDH传送器（集成SONET OC-48接口器件
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| File Size |
469.03K /
25 Page |
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it Online |
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Applied Micro Circuits Corp.
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| Part No. |
S3044
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| OCR Text |
...e format for STS-48 consists of 144 transport overhead bytes followed by Synchronous Payload Envelope (SPE) bytes. This pattern of 144 overh...word boundary. When this input is Low, it will disable the frame detector circuit and it will lock o... |
| Description |
SONET/SDH/ATM OC-48 16 Receiver(带片上高频锁相环6 SONET/SDH接收器（集成SONET OC-48接口器件
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| File Size |
443.84K /
20 Page |
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it Online |
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Applied Micro Circuits Corp.
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| Part No. |
S3064
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| OCR Text |
...e format for STS-48 consists of 144 transport overhead bytes followed by Synchronous Payload Envelope (SPE) bytes. This pattern of 144 overh...word boundary. When this input is Low, it will disable the frame detector circuit and it will lock o... |
| Description |
SONET/SDH/ATM OC-48 Differential 16 Receiver(SONET/SDH/ATM差分16接收
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| File Size |
160.26K /
21 Page |
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it Online |
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Integrated Device Technology, Inc.
INTEGRATED DEVICE TECHNOLOGY INC
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| Part No. |
IDT72T1875L4-4BB IDT72T1865L4-4BBI IDT72T1885L4-4BB IDT72T18105L4-4BB IDT72T1895L4-4BBI IDT72T1855L4-4BBI IDT72T1875L4-4BBI IDT72T1885L4-4BBI IDT72T18115L4-4BBI IDT72T1845L4-4BBI IDT72T18125L4-4BBI IDT72T18105L4-4BBI IDT72T1845L6-7BB IDT72T1865L6-7BB IDT72T1895L6-7BB IDT72T18105L6-7BB IDT72T1845L6-7BBI IDT72T1875L6-7BBI IDT72T1885L6-7BBI IDT72T1895L6-7BBI IDT72T18115L6-7BB IDT72T18125L6-7BB IDT72T1855L6-7BBI IDT72T1865L6-7BBI IDT72T18125L6-7BBI IDT72T18115L6-7BBI IDT72T18105L6-7BBI IDT72T18115L5BBI IDT72T1865L5BB IDT72T1865L5BBI IDT72T1845L5BBI IDT72T1855L5BBI IDT72T18105L5BB IDT72T18125L5BB IDT72T18105L5BBI IDT72T18125L5BBI IDT72T1845L10BBI IDT72T18115L10BBI IDT72T1865L10BBI
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| OCR Text |
...5, IDT72T18115 131,072 x 18/262,144 x 9, 262,144 x 18/524,288 x 9, 524,288 x 18/1,048,576 x 9 IDT72T18125
FEATURES:
*
* * * * * * * *...Word Fall Through timing (using OR and IR flags) Output enable puts data outputs into high impedance... |
| Description |
2.5 VOLT HIGH-SPEED TeraSync FIFO 18-BIT/9-BIT CONFIGURATIONS 2.5伏高速TeraSync先进先出18-BIT/9-BIT配置
2.5 VOLT HIGH-SPEED TeraSync FIFO 18-BIT/9-BIT CONFIGURATIONS 2.5伏高TeraSync先进先出18-BIT/9-BIT配置
2.5 VOLT HIGH-SPEED TeraSync FIFO 18-BIT/9-BIT CONFIGURATIONS 128K X 18 OTHER FIFO, 3.4 ns, PBGA240
2.5 VOLT HIGH-SPEED TeraSync FIFO 18-BIT/9-BIT CONFIGURATIONS 4K X 18 OTHER FIFO, 3.4 ns, PBGA144
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| File Size |
544.11K /
55 Page |
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it Online |
Download Datasheet |
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