| |
|
 |
Cypress Semiconductor, Corp.
|
| Part No. |
CY230809 CY2308ZC-1HT CY2308SC-1T CY2308ZXI-1HT
|
| OCR Text |
...puts Two banks of four outputs, three-stateable by two select inputs 10 MHz to 133 MHz operating range 75 ps typical cycle-to-cycle jitter (15 pF, 66 MHz) Space saving 16-pin 150 mil SOIC package or 16-pin TSSOP 3.3V operation Industrial te... |
| Description |
3.3V Zero Delay Buffer
2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 4.40 MM, MO-153, TSSOP-16
2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 0.150 INCH, MS-012, SOIC-16
|
| File Size |
269.63K /
15 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
意法半导
|
| Part No. |
MK68564N-04 MK68564N-05 MK68564Q-04 MK68564Q-05
|
| OCR Text |
...cknowledge (output, active low, three stateable). DTACK is used to signal the bus master that data is ready or that data has been accepted by the MK68564 SIO. Address Bus (inputs). The address bus is used to select one of the internal regis... |
| Description |
SERIAL INPUT OUTPUT
|
| File Size |
475.12K /
46 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
