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Fujitsu Limited
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| Part No. |
CS201
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| OCR Text |
...speed (up to 10 gbps) interface macros special interfaces (lvds, sstl, others) short-term development using a physical prototyping tool one pass design using a physical synthesis tool hierarchical design environment for supporting... |
| Description |
Semicustom CMOS Standard Cell
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| File Size |
64.67K /
9 Page |
 View
it Online |
Download Datasheet
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Fujitsu Limited
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| Part No. |
CS101
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| OCR Text |
...ndards, and a wi de range of ip macros are available for use. as well as providing a maximum of 100 million gates, appr oximately twice the level of integration achieved in previous products, the power consumption per gate is also reduced ... |
| Description |
Standard Cell
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| File Size |
37.76K /
8 Page |
View
it Online |
Download Datasheet |
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Fujitsu Limited
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| Part No. |
CE77
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| OCR Text |
...those under development) ip macros (cpu, pci, usb, irda, pll, dac, adc, and others including those under development) capable of incorporating compiled cells (ram/rom/fifo/delay line, and others.) configurable internal bus circu... |
| Description |
Semicustom CMOS Embedded array
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| File Size |
159.00K /
24 Page |
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it Online |
Download Datasheet |
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Chip Express
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| Part No. |
CX50041
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| OCR Text |
...ds low - jitter analog pll macros with internal loop filter delay lock loop (dll) m acros for clock de - skewing wide range of synthesizable ip cores such as cpus and interface controllers vast packaging library sta... |
| Description |
(CX5000 Series) Structured ASIC
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| File Size |
116.67K /
6 Page |
View
it Online |
Download Datasheet |
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Price and Availability
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