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    EP1K30 EP1K100 EP1K30QC208-3 EP1K30QC208-2 EP1K30QC208-1 EP1K10QC208-3 EP1K10QC208-2 EP1K10QC208-1 ACEX1K EP1K50 ACEX1 E

ETC[ETC]
Altera Corp
Part No. EP1K30 EP1K100 EP1K30QC208-3 EP1K30QC208-2 EP1K30QC208-1 EP1K10QC208-3 EP1K10QC208-2 EP1K10QC208-1 ACEX1K EP1K50 ACEX1 EP1K10
OCR Text ... focus on simulation and design verification. ACEX 1K device reconfigurability eliminates inventory management for gate array designs and test vector generation for fault coverage. Table 4 shows ACEX 1K device performance for some common de...
Description From old datasheet system
Programmable Logic Family
Simple PLD - Datasheet Reference
Programmable Logic Device Family

File Size 368.83K  /  86 Page

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    AM27C2048 AM27C2048-120DC AM27C2048-120DC5 AM27C2048-120DC5B AM27C2048-120DE5 AM27C2048-120DE5B AM27C2048-120DI5 AM27C20

SPANSION LLC
Advanced Micro Devices, Inc.
AMD[Advanced Micro Devices]
Part No. AM27C2048 AM27C2048-120DC AM27C2048-120DC5 AM27C2048-120DC5B AM27C2048-120DE5 AM27C2048-120DE5B AM27C2048-120DI5 AM27C2048-120DI5B AM27C2048-120JC5 AM27C2048-120JI5 AM27C2048-120PC5 AM27C2048-120PI5 AM27C2048-150DC5 AM27C2048-150DC5B AM27C2048-150DE5 AM27C2048-150DE5B AM27C2048-150DI5 AM27C2048-150DI5B AM27C2048-150JC5 AM27C2048-150JI5 AM27C2048-150PC5 AM27C2048-150PI5 AM27C2048-200DC5 AM27C2048-200DC5B AM27C2048-200DE5 AM27C2048-200DE5B AM27C2048-200DI5 AM27C2048-200DI5B AM27C2048-200JC5 AM27C2048-200JI5 AM27C2048-200PC5 AM27C2048-200PI5 AM27C2048-255DC5 AM27C2048-255DC5B AM27C2048-255DE5 AM27C2048-255DE5B AM27C2048-255DI5 AM27C2048-255DI5B AM27C2048-255JC5 AM27C2048-255JI5 AM27C2048-255PC5 AM27C2048-255PI5 AM27C2048-55DC5 AM27C2048-55DC5B AM27C2048-55DE5 AM27C2048-55DE5B AM27C2048-55DI5 AM27C2048-55DI5B AM27C2048-55JC5 AM27C2048-55JI5 AM27C2048-55PC5 AM27C2048-55PI5 AM27C2048-70DC5 AM27C2048-70DC5B AM27C2048-70DE5 AM27C2048-70DE5B AM27C2048-70DI5 AM27C2048-70DI5B AM27C2048-70JC5 AM27C2048-70JI5 AM27C2048-70PC5 AM27C2048-70PI5 AM27C2048-90DC5 AM27C2048-90DC5B AM27C2048-90DE5 AM27C2048-90DE5B AM27C2048-90DI5 AM27C2048-90DI5B AM27C2048-90JC5 AM27C2048-90JI5 AM27C2048-90PC5 AM27C2048
OCR Text ...rogrammed. Program Verify A verification should be performed on the programmed bits to determine that they were correctly programmed. The verify should be performed with OE# and CE#, at VIL, PGM# at VIH, and VPP between 12.5 V and 13.0 ...
Description    2 Megabit (128 K x 16-Bit) CMOS EPROM
128K X 16 OTPROM, 120 ns, PQCC44
2 Megabit (128 K x 16-Bit) CMOS EPROM 2兆位28亩16位)的CMOS存储
2 Megabit (128 K x 16-Bit) CMOS EPROM 2兆位28亩16位)CMOS存储
TESTER FLAT CABLE 2兆位28亩16位)的CMOS存储
2 Megabit (128 K x 16-Bit) CMOS EPROM 128K X 16 UVPROM, 55 ns, CDIP40
4-Bit Binary Full Adders With Fast Carry 16-SO 0 to 70 2兆位128亩16位)的CMOS存储
TESTER MODULAR CABLE RJ45/12/11
4-Bit Binary Full Adders With Fast Carry 16-SOIC 0 to 70
Evaluation Kit for the MAX3869
2 megabit CMOS EPROM

File Size 91.59K  /  12 Page

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    HT27C512

HOLTEK[Holtek Semiconductor Inc]
Part No. HT27C512
OCR Text ...rammed. Program verify mode verification should be performed on the programmed bits to determine whether they were correctly programmed. The verification should 6 The HT27C512 has two control functions, both of which must be logical...
Description OTP CMOS 64K′ 8-Bit EPROM
OTP CMOS 64Kx 8-Bit EPROM

File Size 255.22K  /  10 Page

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    ICS91718 ICS91718YGLF-T ICS91718YMLF-T

ICST[Integrated Circuit Systems]
Part No. ICS91718 ICS91718YGLF-T ICS91718YMLF-T
OCR Text ... data stored in the latches for verification. Read-Back will support Intel PIIX4 "Block-Read" protocol. 2. The data transfer rate supported by this clock generator is 100K bits/sec or less (standard mode) 3. The input is operating at 3.3V l...
Description Low EMI/ Spread Modulating/ Clock Generator
Low EMI, Spread Modulating, Clock Generator
Low EMI, Spread Modulating Clock Generator

File Size 81.25K  /  11 Page

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    ICS9179-03 ICS9179YG-03-T AV9179F-03-T ICS9179F-03-T

ICST[Integrated Circuit Systems]
Part No. ICS9179-03 ICS9179YG-03-T AV9179F-03-T ICS9179F-03-T
OCR Text ... data stored in the latches for verification. Read-Back will support Intel PIIX4 "Block-Read" protocol. The data transfer rate supported by this clock generator is 100K bits/sec or less (standard mode) The input is operating at 3.3V logic l...
Description Low Skew Fan Out Buffers
Clock Buffer

File Size 295.47K  /  10 Page

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    ICS9179-06 ICS9179F-06

ICST[Integrated Circuit Systems]
Part No. ICS9179-06 ICS9179F-06
OCR Text .... Subject to design engineering verification of target value. Delay Selection Table4 Power Groups VDD = Power supply for OUTPUT buffers VDDS = Power supply for I 2C circuitry VDDA = Power supply for Analog PLL circuitry INPUT Control...
Description Zero Delay Buffers

File Size 459.54K  /  8 Page

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    ICS9179-12 ICS9179M-12 AV9179F-12 ICS9179F-12 AV9179M-12

ICST[Integrated Circuit Systems]
Part No. ICS9179-12 ICS9179M-12 AV9179F-12 ICS9179F-12 AV9179M-12
OCR Text ... data stored in the latches for verification. Read-Back will support Intel PIIX4 "Block-Read" protocol. The data transfer rate supported by this clock generator is 100K bits/sec or less (standard mode) The input is operating at 3.3V logic l...
Description High-Performance Impact-X<TM> PAL(R) Circuits 28-PLCC 0 to 75
3 DIMM Buffer
3dimm buffer

File Size 276.65K  /  9 Page

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    ICS9179B-01 ICS9179BF-01

ICST[Integrated Circuit Systems]
Part No. ICS9179B-01 ICS9179BF-01
OCR Text ... data stored in the latches for verification. (set R/W# to 1 above). There is no BYTE count supported, so it does not meet the Intel SMB PIIX4 protocol. Clock Generator Address (7 bits) A(6:0) & R/W# D3(H) C. D. E. F. ACK Byte 0 ...
Description Low Skew Buffers

File Size 510.52K  /  9 Page

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    ICS9248-101 ICS9248YG-101-T AV9248F-101-T AV9248G-101-T ICS9248F-101-T

ICST[Integrated Circuit Systems]
Integrated Device Technology, Inc.
Part No. ICS9248-101 ICS9248YG-101-T AV9248F-101-T AV9248G-101-T ICS9248F-101-T
OCR Text ... data stored in the latches for verification. Read-Back will support Intel PIIX4 "Block-Read" protocol. The data transfer rate supported by this clock generator is 100K bits/sec or less (standard mode) The input is operating at 3.3V logic l...
Description Frequency generator and intefrated buffer for Pentium/PRO and K6
Frequency Generator & Integrated Buffers for PENTIUM/ProTM & K6
Frequency Generator & Integrated Buffers for PENTIUM/ProTM & K6 频率发生

File Size 360.74K  /  17 Page

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    ICS9248-103 ICS9248YF-103 ICS9248F-103

Integrated Circuit Syst...
ICST[Integrated Circuit Systems]
Part No. ICS9248-103 ICS9248YF-103 ICS9248F-103
OCR Text ... data stored in the latches for verification. Read-Back will support Intel PIIX4 "Block-Read" protocol. The data transfer rate supported by this clock generator is 100K bits/sec or less (standard mode) The input is operating at 3.3V logic l...
Description Frequency Generator & Integrated Buffers for PENTIUM/ProTM
Frequency generator and intefrated buffer for Pentium/PRO

File Size 390.58K  /  16 Page

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