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ICS
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| Part No. |
ICS87951I
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| OCR Text |
lvcmos/LVTTL ZERO DELAY BUFFER
FEATURES
* Fully integrated PLL * 9 single ended 3.3V lvcmos/LVTTL outputs * Selectable single ended CLK0 or differential CLK1, nCLK1 inputs * The single ended CLK0 input can accept the following input level... |
| Description |
Low Skew, 1-to-9, Clock Generator. Industrial Temperature.
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| File Size |
99.46K /
13 Page |
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ALTERA
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| Part No. |
EP20K100EQ EP20K100QC EP20K100EQC240-2
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| OCR Text |
...enter tap terminated (CTT) GTL+ lvcmos LVTTL True-LVDS and LVPECL data pins (in EP20K300E and larger devices) LVDS and LVPECL clock pins (in all BGA and FineLine BGA devices) LVDS and LVPECL data pins up to 156 Mbps (in -1 speed grade devic... |
| Description |
Apex 20KE Device Family (1.8V, LVDS
Apex 20K Device Family (2.5V)
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| File Size |
585.74K /
116 Page |
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it Online |
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ICS
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| Part No. |
ICS843404
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| OCR Text |
lvcmos/CRYSTAL-TO-3.3V LVPECL AND LVDS CLOCK GENERATOR
FEATURES
* Three banks of outputs: 1 bank of 2 LVDS outputs and 2 banks of 1 LVPECL output * Selectable crystal oscillator interface or lvcmos/LVTTL single-ended reference clock input... |
| Description |
Low phase noise, Fibre Channel LVPECL/LVDS Clock Generator
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| File Size |
235.12K /
16 Page |
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it Online |
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ICS
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| Part No. |
ICS9DB206
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| OCR Text |
...on Selects PLL Bandwidth input. lvcmos/LVTTL interface levels.
TABLE 1. PIN DESCRIPTIONS
Number 1 2 3 4 5, 6 7, 13, 16, 22 8, 21 9, 10 11, 12 14, 15 17, 18 19, 20 23, 24 25 26 27 28 Name PLL_BW CLK nCLK FS0 PCIEXT0, PCIEXC0 VDD GND PCIE... |
| Description |
High Performance 1-to-6 HCSL Jitter Attenuator for PCI Express?
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| File Size |
237.04K /
13 Page |
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it Online |
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MAXIM - Dallas Semiconductor
MAXIM[Maxim Integrated Products]
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| Part No. |
MAX9122 MAX9121 MAX9122EUE MAX9121ESE MAX9121EUE MAX9122ESE
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| OCR Text |
...al inputs and translate them to lvcmos outputs. The MAX9122 features integrated parallel termination resistors (nominally 107), which elimin...LVTTL/lvcmos DATA INPUT TX 107 RX
LVTTL/lvcmos DATA OUTPUT
TX
107
RX
TX
107
RX
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| Description |
Quad LVDS Line Receivers with Integrated Termination and Flow-Through Pinout
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| File Size |
228.78K /
12 Page |
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it Online |
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Price and Availability
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