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Integrated Device Techn...
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| Part No. |
ICS854104I
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| OCR Text |
...d at a specific offset from the fundamental compared to the power of the fundamental is called the dbc phase noise. this value is normally expressed using a phase noise plot and is most often the specified plot in many applications. phase n... |
| Description |
Low Skew, 1-to-4, Differential-to-LVDS Fanout Buffer
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| File Size |
284.54K /
15 Page |
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Integrated Device Techn...
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| Part No. |
ICS650-27
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| OCR Text |
... a 12.5 mhz or 25 mhz clock or fundamental mode crystal input to produce multiple output clocks for networking chips, pci devices, sdram, and asics. the ics650-27 outputs all have zero ppm synthesis error. the ics650-27 is pin compatibl... |
| Description |
NETWORKING CLOCK SOURCE
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| File Size |
136.34K /
7 Page |
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Integrated Device Techn...
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| Part No. |
ICS650-07C
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| OCR Text |
... 12.5 mhz or 25.00 mhz clock or fundamental mode crystal input to produce multiple output clocks for networking chips, pci devices, sdram, and asics. the ics650-07c outputs all have 0 ppm synthesis error. see the mk74cb214, ics551, and i... |
| Description |
NETWORKING CLOCK SOURCE
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| File Size |
145.16K /
9 Page |
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Integrated Device Techn...
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| Part No. |
8T49N242-001NLGI
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| OCR Text |
...ingle-ended input clocks and a fundamental-mode crystal input. the internal pll can lock to either of the in put reference clocks or ju st to the crystal to behave as a frequency synthesizer. the pll can use the second input for redunda... |
| Description |
FemtoClock NG Universal Frequency Translator
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| File Size |
1,229.29K /
63 Page |
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Price and Availability
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