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ICS
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| Part No. |
ICS873032
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| OCR Text |
...ial input levels: lvpecl, LVDS, cml, SSTL * Input frequency: 4GHz * Translates any single ended input signal to 3.3V lvpecl levels with resistor bias on nPCLK input * lvpecl mode operating voltage supply range: VCC = 3.0V to 5.5V, VEE = 0V ... |
| Description |
Low Skew, ÷2, Differential-to- lvpecl Clock Generator. Industrial Temperature.
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| File Size |
246.65K /
14 Page |
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ICST[Integrated Circuit Systems]
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| Part No. |
M2021 M2020 M2020-2021
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| OCR Text |
...700 MHz * lvpecl clock output (cml and LVDS options available) Reference clock inputs support differential LVDS, lvpecl, as well as single-ended LVCMOS, LVTTL Loss of Lock (LOL) output pin Narrow Bandwidth control input (NBW pin) Hitle... |
| Description |
VCSO BASED CLOCK PLL
SAW PLL for Frequency Translation with Loss of Lock indicator and Hitless Switching options
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| File Size |
311.52K /
10 Page |
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it Online |
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Philips
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| Part No. |
TZA3012AHW
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| OCR Text |
...emultiplexing ratio * lvpecl or cml demultiplexer outputs * Frame detection for SDH/SONET and GE frames * Parity bit generation * Loop mode inputs on demultiplexer.
TZA3012AHW
Additional features with the I2C-bus * A-rateTM(1): suppor... |
| Description |
30 Mbits/s up to 3.2 Gbits/s
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| File Size |
207.23K /
52 Page |
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Philips
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| Part No. |
TZA3050 TZA3050VH/C1
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| OCR Text |
...lvpecl) and Current Mode Logic (cml) compatible data and clock inputs * Internal common mode voltage available for AC-coupled data and clock...lvpecl) and Current-Mode Logic (cml) data and clock inputs with a voltage swing from 100 mV to 1 V (... |
| Description |
TZA3050; 30 Mbits/s up to 1.25 Gbits/s burst mode laser driver
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| File Size |
103.17K /
24 Page |
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it Online |
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Zarlink
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| Part No. |
ZL30406
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| OCR Text |
... clocks at 77.76 MHz Provides a cml differential clock programmable to 19.44 MHz, 38.88 MHz, 77.76 MHz and 155.52 MHz Provides a single-ende...lvpecl differential output clocks at 77.76 MHz, a cml differential clock programmable to 19.44 MHz, ... |
| Description |
SONET/SDH Clock Multiplier PLL
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| File Size |
232.64K /
20 Page |
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it Online |
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ICS
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| Part No. |
ICS853011C
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| OCR Text |
...ial input levels: lvpecl, LVDS, cml, SSTL * Output frequency: 3GHz * Translates any single ended input signal to 3.3V lvpecl levels with resistor bias on nPCLK input * Output skew: 5ps (typical) * Part-to-part skew: TBD * Propagation delay:... |
| Description |
Low Skew, 1-to-2, Differential-to-lvpecl Fanout Buffer. Improved Performance. Industrial Temperature.
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| File Size |
226.67K /
14 Page |
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it Online |
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ICS
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| Part No. |
ICS853011
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| OCR Text |
...ial input levels: lvpecl, LVDS, cml, SSTL * Maximum output frequency: >3GHz * Translates any single ended input signal to 3.3V lvpecl levels with resistor bias on nPCLK input * Output skew: 5ps (typical) * Part-to-part skew: 130ps (maximum)... |
| Description |
Low Skew, 1-to-2, Differential-to-lvpecl Fanout Buffer. Improved Performance. Industrial Temperature
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| File Size |
205.91K /
15 Page |
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it Online |
Download Datasheet |
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IDT[Integrated Device Technology]
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| Part No. |
IDT5T93GL0 IDT5T93GL06NLI IDT5T93GL06 IDT5T93GL06NLI8
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| OCR Text |
... LVEPECL (2.5V), lvpecl (3.3V), cml, or LVDS input interface Selectable differential inputs to six LVDS outputs Power-down mode 2.5V VDD Available in VFQFPN package
APPLICATIONS:
* Clock distribution
The IDT5T93GL06 2.5V differential... |
| Description |
2.5V LVDS 1:6 Glitchless Clock Buffer TeraBuffer II
2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER-TM II
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| File Size |
105.00K /
15 Page |
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it Online |
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