| |
|
 |
Integrated Circuit Syst...
ICST[Integrated Circuit Systems]
|
| Part No. |
ICS85222 ICS85222AMT ICS85222AM ICS85222AMLF ICS85222AMLFT
|
| OCR Text |
...TTL * Maximum output frequency: 350mhz * Part-to-part skew: 350ps (maximum) * Propagation delay: 1.3ns (maximum) * VOH: 1.2V (maximum) * 3.3...250mhz Minimum 750 150 150 48 47 Typical 950 Maximum 350 1150 350 800 800 52 53 Units MHz ps ps ps p... |
| Description |
DUAL LVCMOS / LVTTL-TO DIFFERENTIAL LVHSTL TRANSLATOR
Dual, 1-to-1, LVCMOS-to-LVHSTL Translator. VOHmax = 1.2V
|
| File Size |
155.60K /
12 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
Integrated Device Technology, Inc.
ICS
|
| Part No. |
ICS8735-31I ICS8735I-31 ICS8735AYI-31LF ICS8735AYI-31T
|
| OCR Text |
...t frequency range: 15.625MHz to 350mhz * Input frequency range: 15.625MHz to 350mhz * VCO range: 250mhz to 700MHz * Programmable dividers allow for the following output-to-input frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8 * External... |
| Description |
8735 SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 7 X 7 MM, 1.40 MM HEIGHT, LQFP-32
8735 SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 7 X 7 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, LQFP-32
Low Skew, Low Jitter 1-to-5, Differential-to-Zero Delay LVPECL Clock Generator (P)
From old datasheet system
|
| File Size |
172.74K /
16 Page |
View
it Online |
Download Datasheet |
| |
|
|
Integrated Device Techn...
|
| Part No. |
85222AMLFT
|
| OCR Text |
...tl ? maximum output frequency: 350mhz ? part-to-part skew: 350ps (maximum) ? propagation delay: 1.3ns (maximum) ? v oh : 1.2v (maximum) ...250mhz 47 53 % 250 < ? 350mhz 45 55 % note 1: measured from v dd /2 of the input to the differen... |
| Description |
Dual LVCMOS / LVTTL-TO-Differential
|
| File Size |
163.28K /
13 Page |
View
it Online |
Download Datasheet |
| |
|
|
ICS
|
| Part No. |
ICS8735-31
|
| OCR Text |
...t frequency range: 15.625MHz to 350mhz * Input frequency range: 15.625MHz to 350mhz * VCO range: 250mhz to 700MHz * Programmable dividers allow for the following output-to-input frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8 * External... |
| Description |
From old datasheet system
Low Skew, Low Jitter 1-to-5, Differential-to-Zero Delay LVPECL Clock Generator (P)
|
| File Size |
181.09K /
16 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
