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mobile-sdram Datasheet PDF File

For mobile-sdram Found Datasheets File :: 1126 Search Time::2.14ms
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				Integrated Device Technology, Inc. ICST[Integrated Circuit Systems]
Part No.	ICS9148-17 ICS9148YF-17-T ICS9148YF-17LF-T
OCR Text	...gic 0 level, when input low (in Mobile Mode, MODE=0) SDRAM clock output Halts PCICLK (0:5) clocks at logic 0 level, when input low (in mobile mode, MODE=0) SDRAM clock output SDRAM clock outputs. Supply for SDRAM (0:11), Core, 24MHz and 48M...
Description	Frequency Generator & Integrated Buffers for PENTIUM/ProTM 频率发生 100.2 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 0.300 INCH, SSOP-48 Frequency Generator & Integrated Buffers for PENTIUM/ProTM Single Chip, SIS 5592/95 100MHz System Clock with AGP Clocks
File Size	464.64K / 15 Page	View it Online	Download Datasheet

				ICST[Integrated Circuit Systems]
Part No.	ICS9148-26 ICS9148F-26
OCR Text	...n select pin, 1=Desktop Mode, 0=Mobile Mode. Latched Input. PCI clock output. PCI clock outputs. Input to Fanout Buffers for SDRAM outputs. Halts PCICLK(0:4) clocks at logic 0 level, when input low (In mobile mode, MODE=0) (Pins 17, 18 SDRA...
Description	High-Performance Impact-X<TM> PAL(R) Circuits 24-PDIP 0 to 75 Frequency Generator & Integrated Buffers for PENTIUM/ProTM BX Main Clock, Single Chip, Supports 50 - 133MHz
File Size	481.69K / 17 Page	View it Online	Download Datasheet

				Integrated Circuit Syst... Integrated Device Technology, Inc. ICST[Integrated Circuit Systems]
Part No.	ICS9148-36 ICS9148YF-36 ICS9148YF-36LF
OCR Text	...gic 0 level, when input low (in Mobile Mode, MODE=0) SDRAM clock output Halts PCICLK(0:5) clocks at logic 0 level, when input low (In mobile mode, MODE=0) SDRAM clock output SDRAM clock outputs. This asynchronous input halts AGP(1:2) clocks...
Description	High-Performance Impact-X<TM> PAL<R> Circuits 24-PDIP 0 to 75 频率发生 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 0.300 INCH, SSOP-48 High-Performance Impact-X<TM> PAL<R> Circuits 24-PDIP 0 to 75 Frequency Generator & Integrated Buffers for PENTIUM/ProTM Single Chip, 100MHz Aladdin V System Clock with 3 AGP Clocks Integrated Circuit Systems
File Size	536.55K / 16 Page	View it Online	Download Datasheet

				ICST[Integrated Circuit Systems]
Part No.	ICS9148-37
OCR Text	...gic 0 level, when input low (in Mobile Mode, MODE=0) SDRAM clock output. Frequency is selected by the SD_SEL latched input. SD_SEL = 1 at power on causes SDRAM frequency = CPU frequency SD_SEL = 0 at power on causes SDRAM frequency = AGP fr...
Description	Single Chip, 100MHz MVP3 Main Clock with AGP Frequency Generator & Integrated Buffers for PENTIUM/Pro
File Size	422.63K / 16 Page	View it Online	Download Datasheet

				ICST[Integrated Circuit Systems]
Part No.	ICS9148-53 ICS9148F-53
OCR Text	...gic 0 level, when input low (in Mobile Mode, MODE=0) SDRAM clock output Halts PCICLK(0:5) clocks at logic 0 level, when input low (In mobile mode, MODE=0) SDRAM clock output SDRAM clock outputs. This asynchronous input halts AGP(1:2) clocks...
Description	Single Chip, 100MHz Aladdin V System Clock with 2 AGP Clocks Frequency Generator & Integrated Buffers for Mother Boards
File Size	536.85K / 18 Page	View it Online	Download Datasheet

				ICST[Integrated Circuit Systems]
Part No.	ICS9148-58 ICS9148F-58 AV9148F-58
OCR Text	...gic 0 level, when input low (in Mobile Mode, MODE=0) SDRAM clock output. Frequency is selected by the SD_SEL latched input. SD_SEL = 1 at power on causes SDRAM frequency = CPU frenquencies SD_SEL = 0 at power on causes SDRAM frequencies = A...
Description	Frequency generator and integrated buffers for PENTIUM/PRO Frequency Generator & Integrated Buffers for PENTIUM/ProTM Single Chip, SIS 5600B 133MHz System Clock with AGP Clocks
File Size	446.31K / 14 Page	View it Online	Download Datasheet

				ICST[Integrated Circuit Systems]
Part No.	ICS9148-82 ICS9148YF-82
OCR Text	...gic 0 level, when input low (in Mobile Mode, MODE=0) SDRAM clock output Halts PCICLK(0:5) clocks at logic 0 level, when input low (In mobile mode, MODE=0) SDRAM clock output SDRAM clock outputs. This asynchronous input halts AGP(1:2) clocks...
Description	Frequency Generator & Integrated Buffers for PENTIUM/ProTM
File Size	792.29K / 16 Page	View it Online	Download Datasheet

				ICST[Integrated Circuit Systems]
Part No.	ICS9148-93 ICS9148F-37
OCR Text	...gic 0 level, when input low (in Mobile Mode, MODE=0) SDRAM clock output. Frequency is selected by the SD_SEL latched input. SD_SEL = 1 at power on causes SDRAM frequency = CPU frequency SD_SEL = 0 at power on causes SDRAM frequency = AGP fr...
Description	Frequency Generator & Integrated Buffers for PENTIUM/ProTM
File Size	623.83K / 14 Page	View it Online	Download Datasheet

				ICST[Integrated Circuit Systems]
Part No.	ICS9148B-04 ICS9148BF-04 ICS9148-04
OCR Text	...gic 0 level, when input low (In mobile mode, MODE=0) SDRAM clock outputs. Supply for SDRAM (0:11), PLL Core and 24, 48MHz clocks, nominal 3.3V. Data input for I2 C serial input. Clock input of I2 C input 24MHz output clock Pin 15, pin 46 f...
Description	Clock Synthesizer Frequency Generator & Integrated Buffers for PENTIUM/ProTM
File Size	577.55K / 14 Page	View it Online	Download Datasheet

				NXP
Part No.	AN10935
OCR Text	...at of a comparable sdr system. mobile sdr and mobile ddr sdram devices are not produced in x8 data width, hence using mobile/low power sdram (1.8 v) will limit the system me mory to half that of a comparable standard sdram (2.5 v/3.3 ...
Description	Using SDR/DDR SDRAM memories
File Size	368.49K / 47 Page	View it Online	Download Datasheet

For mobile-sdram Found Datasheets File :: 1126 Search Time::2.14ms
Page :: | 1 | 2 | 3 | 4 | <5> | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |