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Integrated Circuit Syst... ICST[Integrated Circuit Systems]
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Part No. |
ICS9DB102GLFT ICS9DB102 ICS9DB102FLFT
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OCR Text |
...urrent mode differential output pairs (HSCL) Key Specifications: * Cycle-to-cycle jitter < 35ps * Output-to-output skew < 25 ps Features/Benefits: * CLKREQ# pin for outputs 1 and 4/output enable for Express Card applications * PLL or bypass... |
Description |
2 Output PCI Express Buffer with CLKREQ Function
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File Size |
124.26K /
10 Page |
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ICST[Integrated Circuit Systems]
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Part No. |
ICS854057
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OCR Text |
...ernal termination * PCLK, nPCLK pairs can accept the following differential input levels: LVPECL, LVDS, CML, SSTL * Output frequency: >2GHz * Part-to-part skew: 200ps (maximum) * Propagation delay: 800ps (maximum) * Additive phase jitter, R... |
Description |
4:1 OR 2:1 LVDS CLOCK MULTIPLEXER WITH INTERNAL INPUT TERMINATION
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File Size |
202.89K /
13 Page |
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it Online |
Download Datasheet |
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Price and Availability
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