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NXP Semiconductors N.V.
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| Part No. |
SC16C752IB48128
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| OCR Text |
... register. writing a logic 1 to mcr[0] will set the dtr output to logic 0 (low), enabling the modem. the output of these pins will be a logi...2: pin description continued symbol pin type description
philips semiconductors sc16c752 dual uart... |
| Description |
Dual UART with 64-byte FIFO, SOT313-2 (LQFP48), Reel Pack, SMD, 13", Turned 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP48
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| File Size |
205.14K /
47 Page |
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NXP Semiconductors N.V.
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| Part No. |
SC16C751BIBS128 SC16C751BIBS
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| OCR Text |
...y clearing bit 1 ( r ts) of the mcr. in the auto- r ts mode, r ts is set to the inactive level by the receiver threshold control logic. rx 4...2.5 v, 3 v or 5 v supply voltage. v ss [1] 10 power ground voltage.
sc16c751b_2 ? nxp b.v. 2008. a... |
| Description |
5 V, 3.3 V and 2.5 V UART with 64-byte FIFOs; Package: SOT616-3 (HVQFN24); Container: Reel Pack, SMD, 13", Turned 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQCC32
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| File Size |
139.41K /
32 Page |
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it Online |
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NXP Semiconductors N.V.
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| Part No. |
SC16C652BIBS151 SC16C652BIB48157 SC16C652BIB48151 SC16C652BIB48
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| OCR Text |
... register. writing a logic 1 to mcr[0] will set the dtr output to logic 0, enabling the modem. this pin will be a logic 1 after writing a lo...2 1 d7 3 2 gnd 17 13 i signal and power ground. inta 30 21 o interrupt a, b (3-state). this functio... |
| Description |
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.) with 32-byte FIFOs and infrared (IrDA) encoder/decoder; Package: SOT313-2 (LQFP48); Container: Tray Pack, Bakeable, Single 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP48
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.) with 32-byte FIFOs and infrared (IrDA) encoder/decoder; Package: SOT313-2 (LQFP48); Container: Tray Pack, Bakeable, Multiple 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP48
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.) with 32-byte FIFOs and infrared (IrDA) encoder/decoder; Package: SOT617-1 (HVQFN32); Container: Tray Pack, Bakeable, Single 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQCC32
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| File Size |
193.61K /
43 Page |
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it Online |
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NXP Semiconductors N.V.
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| Part No. |
SC16C752BIBS128 SC16C752BIBS151 SC16C752BIBS157
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| OCR Text |
... register. writing a logic 1 to mcr[0] will set the dtr output to logic 0 (low), enabling the modem. the output of these pins will be a logi...2 october 2008 6 of 47 nxp semiconductors sc16c752b 5 v, 3.3 v and 2.5 v dual uart, 5 mbit/s (max.),... |
| Description |
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs; Package: SOT617-1 (HVQFN32); Container: Reel Pack, SMD, 13", Turned 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQCC32
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs; Package: SOT617-1 (HVQFN32); Container: Tray Pack, Bakeable, Single 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQCC32
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs; Package: SOT617-1 (HVQFN32); Container: Tray Pack, Bakeable, Multiple 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQCC32
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| File Size |
213.90K /
47 Page |
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it Online |
Download Datasheet |
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Exar, Corp.
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| Part No. |
XR16M2751IM48-F
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| OCR Text |
...hrough the software setting of mcr[3]. inta is set to the active mode and op2a# output to a logic 0 when mcr[3] is set to a logic 1. inta...2]. if this pin is not used, tie it to vcc or pull it high via a 100k ohm resistor. rtsa# 33 o uar... |
| Description |
1 CHANNEL(S), 8M bps, SERIAL COMM CONTROLLER, PQFP48 7 X 7 MM, 1 MM HEIGHT, GREEN, TQFP-48
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| File Size |
485.15K /
55 Page |
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it Online |
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Exar, Corp.
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| Part No. |
XR16M2750IM48
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| OCR Text |
...through the software setting of mcr[3]. inta is set to the active mode and op2a# output low when mcr[3] is set to a logic 1. inta is set t...2 . if it is not used, leave it unconnected. rxrdya# - 31 o uart channel a receiver ready (activ e ... |
| Description |
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO 1 CHANNEL(S), 8M bps, SERIAL COMM CONTROLLER, PQFP48
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| File Size |
467.64K /
55 Page |
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it Online |
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Philips
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| Part No. |
SC68C2550B
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| OCR Text |
...hrough the software settings of mcr[3]. op2a/ op2b is a logic 0 when mcr[3] is set to a logic 1. op2a/ op2b is a logic 1 when mcr[3] is set ...2 k w resistor. cd a, cdb 40, 16 i carrier detect (active low). these inputs are associated with in... |
| Description |
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs and Motorola uP interface
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| File Size |
149.74K /
35 Page |
View
it Online |
Download Datasheet |
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