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Cypress Semiconductor Corp.
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| Part No. |
CY7C1335 7C1335 CY7C1335-100AC
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| OCR Text |
...irst clock of a read cycle when emerging from a deselected state.
Functional Description
The CY7C1335 is a 3.3V, 32K by 32 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic.
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| Description |
32K X 32 CACHE SRAM, 5 ns, PQFP100
32K x 32 Synchronous-Pipelined Cache RAM(32K x 32 同步流水线式高速缓冲存储器 RAM) 32K的32同步流水线缓存内存（32K的32同步流水线式高速缓冲存储器的RAM
From old datasheet system
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| File Size |
277.35K /
15 Page |
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Cypress Semiconductor Corp.
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| Part No. |
CY7C1339 7C1339
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| OCR Text |
...irst clock of a read cycle when emerging from a deselected state.
Functional Description
The CY7C1339 is a 3.3V, 128K by 32 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic.
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| Description |
128K x 32 Synchronous-Pipelined Cache RAM(128K x 32 同步流水线式高速缓冲存储器 RAM)
From old datasheet system
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| File Size |
277.19K /
15 Page |
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Cypress
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| Part No. |
CY7C1360V25 CY7C1362V25 CY7C1364V25 7C1360V
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| OCR Text |
...irst clock of a read cycle when emerging from a deselected state.
Functional Description
The CY7C1360V25, CY7C1364V25 and CY7C1362V25 are 2.5V, 256K x 36, 256K x 32 and 512K x 18 synchronous-pipelined cache SRAM, respectively. They are ... |
| Description |
256K x 36/256K x 32/512K x 18 Pipelined SRAM
From old datasheet system
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| File Size |
412.55K /
31 Page |
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Cypress Semiconductor Corp.
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| Part No. |
CY7C1334 7C1334
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| OCR Text |
...ce, during the first clock when emerging from a deselected state, and when the device has been deselected. Clock Enable Input, active LOW. When asserted LOW the clock signal is recognized by the SRAM. When deasserted HIGH the clock signal i... |
| Description |
64Kx32 Flow-Thru SRAM with NoBL Architecture(B>NoBL结构4Kx32流通式 SRAM)
From old datasheet system
64Kx32 Pipelined SRAM with NoBL Architecture
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| File Size |
183.37K /
11 Page |
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Cypress Semiconductor, Corp.
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| Part No. |
CY7C1339G-166BGC CY7C1339G-133AXE CY7C1339G-200BGXI CY7C1339G-200BGXC CY7C1339G-250BGXC
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| OCR Text |
...irst clock of a read cycle when emerging from a deselected state. 234 567 1 a b c d e f g h j k l m n p r t u v ddq nc/288m nc/144m nc dq c dq d dq c dq d aa aa adsp v ddq ce 2 a dq c v ddq dq c v ddq v ddq v ddq dq d dq d nc nc v ddq v dd... |
| Description |
4-Mbit (128K x 32) Pipelined Sync SRAM 128K X 32 CACHE SRAM, 3.5 ns, PBGA119
4-Mbit (128K x 32) Pipelined Sync SRAM 128K X 32 CACHE SRAM, 4 ns, PQFP100
4-Mbit (128K x 32) Pipelined Sync SRAM 128K X 32 CACHE SRAM, 2.8 ns, PBGA119
4-Mbit (128K x 32) Pipelined Sync SRAM 128K X 32 CACHE SRAM, 2.6 ns, PBGA119
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| File Size |
382.78K /
18 Page |
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Lineage Power, Corp.
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| Part No. |
HW3100
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| OCR Text |
...ting services: voice v.90 and emerging v.92 analog modems g.lite splitterless dsl (g.992.2) full-rate dsl (g.992.1) isdn n highly integrated hw2000 afe: support for all homepna 2.0 front-end transmit and receive operations minima... |
| Description |
Home Phoneline Networking Chip Set(主电话线网络物理 家庭电话线网络芯片组（主电话线网络物理层
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| File Size |
92.39K /
6 Page |
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