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PERICOM[Pericom Semiconductor Corporation]
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| Part No. |
PI6C2972FCE PI6C2972 PI6C2972FC
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| OCR Text |
...GNDO Qc0 VCCO Qc1 fselc0 fselc1 Qc2 VCCO Qc3 GND0 Inv_Clk
Frz_Clk
Frz_Data
fselFB2
GND1
PLL_EN
Ref_Sel
TClk_Sel
TClk...8, /12 /4, /6, /8, /10 /2, /4, /6, /8 fsela0:1 fselb0:1 fselc0:1 fselFBO:1 2 2 2 2 Data Generator D ... |
| Description |
Low Voltage PLL Clock Driver
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| File Size |
181.60K /
7 Page |
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it Online |
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MOTOROLA[Motorola, Inc]
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| Part No. |
MC100ES6226FA MC100ES6226 MC100ES6226D
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| OCR Text |
... QB2 QB2 Bank C QC0 QC0 QC1 QC1 QC2 QC2
MR
FSEL0 FSEL1
Freescale Semiconductor, Inc...
OE
Sync
Figure 1. MC100ES6226 Logic...8 12 11 10 9
GND
VCC
CLK
CLK
FSEL0
FSEL1
Figure 2. 32-Lead Package Pinout (Top ... |
| Description |
2.5/3.3V Differential LVPECL 1:9 Clock Distribution Buffer and Clock Divider
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| File Size |
274.46K /
12 Page |
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it Online |
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Motorola
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| Part No. |
MC100ES6226
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| OCR Text |
... QB2 QB2 Bank C QC0 QC0 QC1 QC1 QC2 QC2
MR
FSEL0 FSEL1
OE
Sync
Figure 1. MC100ES6226 Logic Diagram
VCC
24 QA2 QA2 VCC Q...8 12 11 10 9
GND
VCC
CLK
CLK
FSEL0
FSEL1
Figure 2. 32-Lead Package Pinout (Top ... |
| Description |
2.5/3.3V Dlfferentlal LVPECL 1:9 Clock Distribution Buffer and Clock Dlvlder
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| File Size |
126.51K /
12 Page |
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it Online |
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Integrated Circuit Syst...
ICST[Integrated Circuit Systems]
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| Part No. |
ICS87973I-147 ICS7973DI147 ICS87973DYI-147 ICS87973DYI-147T ICS87973-147I
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| OCR Text |
... addition, 2 outputs in Bank C (QC2, QC3) can be selected to be inverting or non-inverting. The output frequency range is 10MHz to 150MHz. T...8, /12 /4, /6, /8, /10 /2, /4, /6, /8 2 2 FSEL_B0:1 FSEL_C0:1 FSEL_FB0:2 2 3 DATA GENERATOR SYNC PUL... |
| Description |
From old datasheet system
LOW SKEW, 1-TO-12 LVCMOS / LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER 低偏移，112个LVCMOS / LVTTL时钟倍频/零延迟缓冲器
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| File Size |
271.75K /
16 Page |
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it Online |
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Motorola
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| Part No. |
MPC9773
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| OCR Text |
...C QC0 CLK STOP 0 1 CLK STOP QC1 QC2 QC3 QFB CLK STOP QSYNC CLK STOP QA1 QA2 QA3 QB0
1 Ref 0 VCO /2 /1 0
0 1 1
0 1 VCC
PLL
200-4...8 9 10 11 12 13 26 25 24 23 22 21 FSEL_FB1 QSYNC GND QC0 VCC QC1 FSEL_C0 FSEL_C1 QC2 VCC QC3 GND INV... |
| Description |
3.3V 1:12 LVCMOS PLL Clock Generator
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| File Size |
216.68K /
20 Page |
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it Online |
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AGERE[Agere Systems]
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| Part No. |
LCK4973
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| OCR Text |
... VSS
16 Qc3
17 VDDO
18 Qc2
19 fselc1
20 fselc0
21 Qc1
22 VDDO
23 Qc0
24 VSS
25 QSync
26 fselFB1
fselb1 3...8
TCLK_Sel
LVTTL
I
9, 10 11
TCLK[0:1] PCLK
LVTTL LVTTL
I I
12
PCLK
LVT... |
| Description |
Low-Voltage PLL Clock Driver
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| File Size |
203.19K /
16 Page |
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ICST[Integrated Circuit Systems]
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| Part No. |
ICS87972I ICS87972DYIT
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| OCR Text |
... addition, 2 outputs in Bank C (QC2, QC3) can be selected to be inverting or non-inverting. The output frequency range is 8.33MHz - 125MHz. Input frequency range is 5MHz - 120MHz. The ICS87972I also has a QSYNC output which can be used for ... |
| Description |
LOW SKEW, 1-TO-12 LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER
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| File Size |
108.27K /
14 Page |
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Motorola
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| Part No. |
MPC991
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| OCR Text |
...
Qb1
Qb1
Qb0
Qb0
Qc2 11 VCCI
MPC991
2
3
4
5
6
7
8
9
10
Test_Clk
PLL_En
Ref_Sel
fselFB2
fselFB1
fselFB0
ECL_CLK (991)
Figure 1. 52-Lead Pinout (Top View)
FUNCTION TABLE ... |
| Description |
Low Voltage PLL Clock Drlver
From old datasheet system
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| File Size |
108.23K /
8 Page |
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it Online |
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