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phy link-layer Datasheet PDF File

For phy link-layer Found Datasheets File :: 1317 Search Time::1.687ms
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				AGERE[Agere Systems]
Part No.	FW804 FW804-09-DB
OCR Text	phy IEEE * 1394A Four-Cable Transceiver/Arbiter Device Distinguishing Features I I Supports LPS/link-on as a part of phy-link interface. Supports provisions of IEEE 1394-1995 Standard for a High Performance Serial Bus. Fully interopera...
Description	phy IEEE 1394A Four-Cable Transceiver/Arbiter Device
File Size	244.61K / 24 Page	View it Online	Download Datasheet

				ETC[ETC]
Part No.	W3100A
OCR Text	...connects directly to the ENDEC (phy device). is active high. This This signal 55 TX_CLK I TRANSMIT CLOCK: TX_CLK is sourced by t...LINK I LINK: This is the signal generated by Ethernet phy to indicate the phy is connected to ...
Description	i2Chip W3100A
File Size	551.09K / 63 Page	View it Online	Download Datasheet

				IDT[Integrated Device Technology]
Part No.	IDT77V106 IDT77V106L200TFI IDT77V106L25
OCR Text	phy for 25.6 and 51.2 Mbps IDT77V106L25 FEATURES: * Performs the phy-Transmission Convergence (TC) and DESCRIPTION: The IDT77V106...link (UTP Category 3 and 5) to an ATM layer device such as a SAR or a switch ASIC. The IDT77V106L25 ...
Description	3.3V ATM phy for 25.6 and 51.2 Mbps
File Size	211.72K / 27 Page	View it Online	Download Datasheet

				IDT[Integrated Device Technology]
Part No.	IDT77V107 IDT77V107L25PF IDT77V107L25PFI
OCR Text	phy for 25.6 and 51.2 Mbps with Utopia Level 2 IDT77V107 Features List ! ! ! ! ! ! ! ! ! ! ! ! Performs the phy-Transmission...link (UTP Category 3) to an ATM Functional Block Diagram TxLED TxREF TxAddr[4:0] TxCLK TxDATA 9 ...
Description	3.3V ATM phy for 25.6 and 51.2 Mbps Applications with UTOPIA level 2 Interface Single ATM phy for 25.6 and 51.2 Mbps with Utopia Level 2
File Size	174.29K / 24 Page	View it Online	Download Datasheet

				VIA Technologies ETC[ETC]
Part No.	VT6305
OCR Text	............................... 21 phy Control Registers..........................................................................................LINK LAYER CONTROLLER FOR THE PCI BUS * * * Single Chip PCI Host Controller for IEEE P1394.A Data T...
Description	PCI 1394 Host Controller
File Size	218.01K / 35 Page	View it Online	Download Datasheet

For phy link-layer Found Datasheets File :: 1317 Search Time::1.687ms
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