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				ICS
Part No.	M2004-X3
OCR Text	...and -23 device variants add the hitless Switching with Phase Build-out (HS/PBO) feature. LOL M2 M3 M4 M5 VCC DNC DNC DNC 27 26 25 24 23 22 21 20 19 28 29 30 31 32 33 34 35 36 M2004-x3 (Top View) 18 17 16 15 14 13 12 11 10 ...
Description	SAW PLL Frequency Translation Family with Loss of Lock indicator and hitless Switching options
File Size	65.43K / 1 Page	View it Online	Download Datasheet

				Maxim Integrated Products Maxim Integrated Produc...
Part No.	DS31406 DS31406GN
OCR Text	... holdover capability, and truly hitless switching between input clocks. The digital PLL is followed by a clock synthesis subsystem which has seven fully programmable digital frequency synthesis blocks, three high-speed low-jitter APLLs, and...
Description	2-Input, 14-Output, Single DPLL Timing IC with Sub-ps Output Jitter
File Size	129.14K / 5 Page	View it Online	Download Datasheet

				Maxim Integrated Products
Part No.	DS31407
OCR Text	... holdover capability, and truly hitless switching between input clocks. The digital PLL is followed by a clock synthesis subsystem that has two fully programmable digital frequency synthesis blocks, a high-speed low-jitter APLL, and four ou...
Description	3-Input, 4-Output, Single DPLL Timing IC with Sub-ps Output Jitter Differential
File Size	128.25K / 4 Page	View it Online	Download Datasheet

				ICST[Integrated Circuit Systems]
Part No.	M2021 M2020 M2020-2021
OCR Text	...dwidth control input (NBW pin) hitless Switching (HS) options with or without Phase Build-out (PBO) available for SONET (GR-253) / SDH (G.813) MTIE and TDEV compliance during reference clock reselection Industrial temperature grade availa...
Description	VCSO BASED CLOCK PLL SAW PLL for Frequency Translation with Loss of Lock indicator and hitless Switching options
File Size	311.52K / 10 Page	View it Online	Download Datasheet

				Maxim Integrated Products Maxim Integrated Produc...
Part No.	DS31408 DS31408GN
OCR Text	... holdover capability, and truly hitless switching between input clocks. The digital PLLs are followed by a clock synthesis subsystem that has seven fully programmable digital frequency synthesis blocks, three high-speed low-jitter APLLs, an...
Description	8-Input, 14-Output, Dual DPLL Timing IC with Sub-ps Output Jitter and 1588 Clock
File Size	232.90K / 6 Page	View it Online	Download Datasheet

				Maxim Integrated Products
Part No.	DS31415
OCR Text	... holdover capability, and truly hitless switching between input clocks. The digital PLL is followed by a clock synthesis subsystem that has two fully programmable digital frequency synthesis blocks, a high-speed low-jitter APLL, and four ou...
Description	3-Input, 4-Output, Single DPLL Timing IC with Sub-ps Output Jitter and 1588 Clock
File Size	137.17K / 5 Page	View it Online	Download Datasheet

				Integrated Circuit Syst... ICST[Integrated Circuit Systems] INTEGRATED DEVICE TECHNOLOGY INC
Part No.	M2006-12A-622.0800 M2006-12A-669.6429 M2006-12AI669.3266 M2006-12AI669.6429 M2006-12A M2006-12A-625.0000 M2006-12A-669.3266 M2006-12AI622.0800 M2006-12AI625.0000 M2006-12AI670.8386
OCR Text	hitless SWITCHING PIN ASSIGNMENT (9 x 9 mm SMT) FIN_SEL1 GND APC DIF_REF0 nDIF_REF0 REF_SEL DIF_REF1 nDIF_REF1 VCC FIN_SEL0 FEC_SEL0 FEC_SEL1 FEC_SEL2 FEC_SEL3 VCC DNC DNC DNC 27 26 25 24 23 22 21 20 19 GENERAL DESCRIPTION The M2006-1...
Description	VCSO BASED FEC CLOCK PLL WITH hitless SWITCHING ATM/SONET/SDH SUPPORT CIRCUIT, QCC36
File Size	297.11K / 10 Page	View it Online	Download Datasheet

				Vitesse Semiconductor Corporation
Part No.	VSC9180
OCR Text	...ck Output 4Serial Loopback with hitless Input Selection and Realignment 4Onboard Discrete CMU and CRU to Accommodate Non-synchronous TX/RX Applications F E AT U R E S : Parallel to Serial Transmit 4Receives 16 or 4-Bit Parallel LVDS/LVPE...
Description
File Size	838.67K / 2 Page	View it Online	Download Datasheet

				Integrated Circuit Systems, Inc. ICST[Integrated Circuit Systems]
Part No.	M1040 M1040-11-155.5200 M1040-11-156.2500 M1040-11I156.2500 M1040-11I155.5200
OCR Text	...reselection upon clock failure; hitless Switching (HS), Phase Build-out (PBO) options enable SONET (GR-253)/SDH (G.813) MTIE/TDEV compliance Acknowledge pin (REF_ACK pin) indicates the actively selected reference input Industrial temperat...
Description	VCSO BASED CLOCK PLL WITH AUTOSWITCH
File Size	319.02K / 12 Page	View it Online	Download Datasheet

				Raltron Electronics
Part No.	SY02-HLPL
OCR Text	hitless SYNCHRONIZER - SY02-HLPL SY02-HLPL PRELIMINARY SPECIFICATION Date: July 1, 2002 * INTRODUCTION The SY02-HLPL is a dual input reference hitless switching device with high frequency crystal-based PLL synchronizer designed ...
Description	SYNCHRONOUS EQUIPMENT CLOCK REGENERATOR
File Size	251.38K / 5 Page	View it Online	Download Datasheet

For hitless Found Datasheets File :: 238 Search Time::0.954ms
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