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  buffer divider Datasheet PDF File

For buffer divider Found Datasheets File :: 4142    Search Time::1.078ms    
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    DS1WM

Dallas Semiconducotr
Part No. DS1WM
OCR Text ...er int enable register data bus buffer control logic maste r reset 1-wire timing and control interrupt control logic dq a0 mr d0-d7 intr a1 a2 ads rd wr en clk clock divider command register transmit buffer tx shift register rx shift regist...
Description Synthesizable 1-Wire Bus Master

File Size 200.17K  /  15 Page

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    TDA18271HD/C2

NXP Semiconductors
Part No. TDA18271HD/C2
OCR Text ...ion n crystal oscillator output buffer (16 mhz) for single crystal applications n i 2 c-bus interface compatible with 3.3 v and 5 v microcon...divider crystal oscillator dc-to-dc converter digital circuitry lc tracking filters rf polyphase fil...
Description Silicon Tuner IC
   Silicon Tuner IC

File Size 309.34K  /  69 Page

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    Zarlink Semiconductor Inc.
Zarlink Semiconductor, Inc.
Part No. SP8853/A/DG SP8853/AC/DG
OCR Text ...BIT 2 BIT DUAL F1/F2 DATA buffer 1 BIT CHARGE PUMP 1 N21 24 28 RPD Cd 3 PD1 N0 15 16 N3 N4 N18 N19 N20 DATA I...divider fREF OUTPUT INTERFACE FREF* 4 FPD* *FREF and FPD outputs are reversed by the pha...
Description 1.3 GHz Professional Synthesiser PLL FREQUENCY SYNTHESIZER, 1300 MHz, CDIP28

File Size 282.45K  /  14 Page

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    PCS5P9773G-52-ET PCS5I9773G-52-ER PCS5P9773G-52-ER PCS5I9773G-52-ET

PulseCore Semiconductor
Part No. PCS5P9773G-52-ET PCS5I9773G-52-ER PCS5P9773G-52-ER PCS5I9773G-52-ET
OCR Text buffer Features * * * * * * * * Output frequency range: 8.33MHz to 200MHz Input frequency range: 6.25MHz to 125MHz 2.5V or 3.3V operation ...divider (see Table 1. Frequency Table). When PLL_EN is LOW, PLL is bypassed and the reference clock ...
Description 2.5V or 3.3V, 200-MHz, 12-Output Zero Delay buffer

File Size 619.13K  /  16 Page

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    ICS8752 ICS8752CY ICS8752CYT

ICST[Integrated Circuit Systems]
Part No. ICS8752 ICS8752CY ICS8752CYT
OCR Text buffer FEATURES * Fully integrated PLL * 8 LVCMOS outputs, 7 typical output impedance * Selectable LVCMOS CLK0 or CLK1 inputs for redundan...divider values of Bank A and B are controlled by the DIV_SELA0:1, and DIV_SELB0:1, respectively. For...
Description LOW SKEW, 1-TO-8 LVCMOS CLOCK MULTIPLIER/ZERO DELAY buffer

File Size 98.91K  /  15 Page

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    Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
Part No. CY2308SI-1HT CY2308ZI-1HT CY2308SXI-5HT CY2308SXI-3T CY2308-5H CY2308-1H CY2308SI-1T CY2308SXI-1T CY2308SXI-4T CY2308SI-4T CY2308-3 CY2308ZXC-1HT CY2308SC-2T CY2308SI-2T CY2308SXI-2T CY2308SXC-2T CY2308SC-5HT CY2308SXC-4T
OCR Text buffer cypress semiconductor corporation ? 198 champion court ? san jose , ca 95134-1709 ? 408-943-2600 document number: 38-07146 rev. *e ...divider (?2, ?3) /2 extra divider (?3, ?4) extra divider (?5h) /2 logic block diagram [+] feedback ...
Description 3.3V Zero Delay buffer 3.3零延迟缓冲器
3.3V Zero Delay buffer 2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16

File Size 246.47K  /  15 Page

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