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INTEGRATED DEVICE TECHNOLOGY INC
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| Part No. |
ICS8731CY-01 ICS8731CY-01LFT ICS8731CY-01T
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| OCR Text |
...ages 48 47 46 45 44 43 42 41 40 39 38 37 13 14 15 16 17 18 19 20 21 22 23 24 1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 ...700mhz the ics8731-01 is targeted at high perfor- mance clock applications. along with a fully integ... |
| Description |
PLL BASED CLOCK DRIVER, 11 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48
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| File Size |
162.54K /
16 Page |
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http://
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| Part No. |
KSN-700A-3C19
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| OCR Text |
... 700 6.30 6.56 6.58 35.75 38.23 39.51 9.93 11.93 14.00 comparison spurious order comparison spurious @fcarrier 700mhz+(n*fcomparison) (dbc) note 1 n -45c +25c +85c -5 -90.19 -90.60 -95.57 -4 -89.28 -91.85 -99.43 -3 -90.1... |
| Description |
Frequency Synthesizer
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| File Size |
632.40K /
9 Page |
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it Online |
Download Datasheet |
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DB Lectro, Inc.
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| Part No. |
ICS843002CY-31 ICS843002CY-31LFT ICS843002CY31
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| OCR Text |
...5 16 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 ics843002-31 v ee ref_clk vclk lock v cco _ cmos nqb qb v ee nqa qa v cco _ pecl mp npb...700mhz on 2 differential lvpecl output pairs (qa/nqa, qb/nqb). the vcxo pll stage has a 13-bit input... |
| Description |
700MHZ FEMTOCLOCKSVCXO BASED FREQUENCY TRANSLATOR AND JITTER ATTENUATOR ⑩VCXO00MHz的FEMTOCLOCKS基于频率转换和抖动衰减器
700MHZ FEMTOCLOCKS??VCXO BASED FREQUENCY TRANSLATOR AND JITTER ATTENUATOR
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| File Size |
269.01K /
27 Page |
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it Online |
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Ecliptek, Corp.
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| Part No. |
EC1300HS-39.700M
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| OCR Text |
39.700m ec13 00 hs -39.700m series rohs compliant (pb-free) 3.3v 8 pin dip metal thru-hole lvcmos/ttl oscillator frequency tolerance/stab...700mhz pin 1 connection no connect duty cycle 50 10(%) electrical specifications nominal frequency 3... |
| Description |
OSCILLATORS 100PPM 0 70 3.3V 4 39.700mhz NC CMOS HALF 8PIN DIP CRYSTAL OSCILLATOR, CLOCK, 39.7 MHz, LVCMOS OUTPUT
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| File Size |
149.24K /
7 Page |
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ICS
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| Part No. |
ICS8732-01
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| OCR Text |
...0 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34
VCCO nQB3 QB3 nQB2 QB2 VEE MR VCCO nQB1 QB1 nQB0 QB0 VEE
PLL_SEL
DIV_SELA0 DIV_SE...700MHz. NOTE 2: The maximum input frequency that the phase detector can accept is 175MHz.
8732AY-... |
| Description |
Low Skew, 1-to-10, LVPECL Clock Multiplier/Zero Delay Buffer
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| File Size |
145.68K /
16 Page |
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it Online |
Download Datasheet |
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Price and Availability
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