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180CA SMAJ130 OM6005SC HT46C46 25AA1 34006 TA0751B CSTN02
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  trec Datasheet PDF File

For trec Found Datasheets File :: 1631    Search Time::3.187ms    
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    DS1330Y DS1330AB DS1330ABP-100 DS1330ABP-100-IND DS1330YP-100 DS1330YP-70 DS1330YP-70-IND DS1330ABP-70 DS1330ABP-70-IND

Maxim Integrated Products, Inc.
MAXIM - Dallas Semiconductor
Dallas Semiconducotr
DALLAS[Dallas Semiconductor]
http://
Part No. DS1330Y DS1330AB DS1330ABP-100 DS1330ABP-100-IND DS1330YP-100 DS1330YP-70 DS1330YP-70-IND DS1330ABP-70 DS1330ABP-70-IND DS1330YP-100-IND
OCR Text ...ower-on transients and to allow trec to elapse. RST has an open drain output driver. BATTERY MONITORING The DS1330 devices automatically perform periodic battery voltage monitoring on a 24-hour time interval. Such monitoring begins with...
Description 256k Nonvolatile SRAM with Battery Monitor 256k非易失SRAM与电池监视器
(DS1330Y / DS1330AB) 256k Nonvolatile SRAM with Battery Monitor

File Size 188.63K  /  11 Page

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    Zarlink
Part No. MT8889
OCR Text ...Electrical Characteristics) and trec is the minimum signal duration to be recognized by the receiver. A value for C1 of 0.1 F is recommended for most tGTP = (RPC1) In [VDD / (VDD-VTSt)] tGTA = (R1C1) In (VDD/VTSt) VDD C1 St/GT RP = (R1R2) ...
Description Integrated DTMF Transceiver with Adaptive Micro Interface
From old datasheet system

File Size 509.05K  /  31 Page

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    Zarlink
Part No. MT8889C 101
OCR Text ...Electrical Characteristics) and trec is the minimum signal duration to be recognized by the receiver. A value for C1 of 0.1 F is recommended for most tGTP = (RPC1) In [VDD / (VDD-VTSt)] tGTA = (R1C1) In (VDD/VTSt) VDD C1 St/GT RP = (R1R2) ...
Description Integrated DTMF Transceiver with Adaptive Micro Interface
From old datasheet system

File Size 737.48K  /  30 Page

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    74LCX573WM 74LCX573 74LCX573MTC 74LCX573MTCX-NL3 74LCX573SJ 74LCX573BQX2 74LCX573MSA

http://
FAIRCHILD[Fairchild Semiconductor]
Part No. 74LCX573WM 74LCX573 74LCX573MTC 74LCX573MTCX-NL3 74LCX573SJ 74LCX573BQX2 74LCX573MSA
OCR Text ...ng Functions tW CONTROL IN Vmi trec CLOCK tPHL OUTPUT Vmo Vmi tPLH Vmo VCC GND 3-STATE Output High Enable and Disable Times for Logic DATA IN tS CONTROL INPUT tS MR OR CLEAR trec Vmi tH Vmi Vmi VCC GND VCC GND Propagation Delay, Pul...
Description LOW VOLTAGE OCTAL LATCH WITH 5V TOLERANT INPUTS AND OUTPUTS

File Size 749.57K  /  14 Page

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    MOTOROLA[Motorola, Inc]
MOTOROLA[Motorola Inc]
Part No. 74LS293 SN74LS293N SN54LS290 SN54LS290J SN54LS293J SN74LS290D SN74LS290N SN74LS293 SN74LS293D
OCR Text ...Limits LS290 Symbol tW tW tW tW trec CP0 Pulse Width CP1 Pulse Width MS Pulse Width MR Pulse Width Recovery Time MR to CP Parameter Min 15 30 15 15 25 15 25 Max LS293 Min 15 30 Max Unit ns ns ns ns ns RECOVERY TIME (trec) is defined as t...
Description DECADE COUNTER; 4-BIT BINARY COUNTER

File Size 204.86K  /  7 Page

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    MIRA
Part No. CHD408LVS CHD408LVW
OCR Text ...) tsu(A-WH) tsu(S) tsu(D) th(D) trec(W) tdis(W) tdis(OE) ten(W) ten(OE) Write cycle time (ns) Write pulse width (ns) Address setup time (ns) Add setup to Write high (ns) Chip select setup time (ns) Data setup time (ns) Data hold time (ns) W...
Description 4M-Bit Low Power Asynchronous SRAM

File Size 134.41K  /  11 Page

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    54LS193 74LS192 SN74LS192D SN74LS192N SN54LS192J SN74LS193 74LS193 SN74LS193N SN54LS192 SN54LS193J SN74LS193D

MOTOROLA[Motorola, Inc]
Motorola Inc
MOTOROLA[Motorola Inc]
Part No. 54LS193 74LS192 SN74LS192D SN74LS192N SN54LS192J SN74LS193 74LS193 SN74LS193N SN54LS192 SN54LS193J SN74LS193D
OCR Text ... = 25C) Limits Symbol tW ts th trec Parameter Any Pulse Width Data Setup Time Data Hold Time Recovery Time Min 20 20 5.0 40 Typ Max Unit ns ns ns ns VCC = 5.0 V Test Conditions DEFINITIONS OF TERMS SETUP TIME (ts) is defined as the mini...
Description PRESETTABLE BCD/DECADE UP/DOWN COUNTER PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER

File Size 275.58K  /  9 Page

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    74ALS109AN 74ALS109A 74ALS109AD

Rochester Electronics, LLC
PHILIPS[Philips Semiconductors]
NXP Semiconductors
Part No. 74ALS109AN 74ALS109A 74ALS109AD
OCR Text ...(H) th (L) tw (H) tw (L) tw (L) trec Setup time, High or Low Jn, Kn to CPn Hold time, High or Low Jn, Kn to CPn CPn Pulse width High or Low SDn or RDn Pulse width Low Recovery time, SDn or RDn to CPn Waveform 1 Waveform 1 Waveform 1 Wavefor...
Description Dual J-K positive edge-triggered flip-flop with set and reset ALS SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16

File Size 87.67K  /  9 Page

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    Dallas
Part No. DS1345W 1345W
OCR Text ...ower-on transients and to allow trec to elapse. RST has an open-drain output driver. BATTERY MONITORING The DS1345W automatically performs periodic battery voltage monitoring on a 24 hour time interval. Such monitoring begins within tRE...
Description 3.3V 1024K Nonvolatile SRAM with Battery Monitor
From old datasheet system

File Size 108.27K  /  11 Page

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For trec Found Datasheets File :: 1631    Search Time::3.187ms    
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