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For locks Found Datasheets File :: 1864 Search Time::2.219ms
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				Agilent (Hewlett-Packard) HP[Agilent(Hewlett-Packard)]
Part No.	HDMP-1022 HDMP-1024
OCR Text	...clock. The PLL/ Clock Generator locks on to this incoming rate and multiplies the clock up to the needed high speed serial clock. Based on M20SEL, which determines whether the incoming data frame is 16 or 20 bits wide, the PLL/Clock Generat...
Description	Low Cost Gigabit Rate Transmit/Receive Chip Set with TTL I/Os
File Size	292.53K / 40 Page	View it Online	Download Datasheet

				Agilent (Hewlett-Packard) HP[Agilent(Hewlett-Packard)]
Part No.	HDMP-1512 HDMP-1514
OCR Text	...nternal phase locked loop (PLL) locks to the transmit byte clock, TBC. TBC is supplied to the transmitter chip by the sending system. TBC should be a 53.125 MHz clock ( 100 ppm) as defined in X3.230-1994. Once the PLL has locked to TBC, all...
Description	Fibre Channel Transmitter and Receiver Chipset
File Size	245.24K / 26 Page	View it Online	Download Datasheet

				HP[Agilent(Hewlett-Packard)] Agilent (Hewlett-Packard)
Part No.	HDMP-1526
OCR Text	.... The transmitter section's PLL locks to this user supplied 106.25 MHz byte clock. This clock is multiplied by 10, to generate the 1062.5 MHz serial signal clock used to generate the high-speed output. The high-speed outputs are capable of ...
Description	Transistor Diode Kit;Contents Of Kit:Transistor/Diode Kit Fibre Channel Transceiver Chip
File Size	217.05K / 14 Page	View it Online	Download Datasheet

				Agilent (Hewlett-Packard) HP[Agilent(Hewlett-Packard)]
Part No.	HDMP-1536 HDMP-1546
OCR Text	.... The transmitter section's PLL locks to this user supplied 106.25 MHz byte clock. This clock is then multiplied by 10, to generate the 1062.5 MHz serial signal clock used to generate the highspeed output. The high-speed outputs are capable...
Description	Fibre Channel Transceiver Chip
File Size	246.58K / 15 Page	View it Online	Download Datasheet

				Dantona Industries, Inc. HP[Agilent(Hewlett-Packard)] Agilent (Hewlett-Packard)
Part No.	HDMP-1636 HDMP-1646
OCR Text	.... The transmitter section's PLL locks to this user supplied 125 MHz byte clock. This clock is then multiplied by 10, to generate the 1250 MHz serial signal clock used to generate the high speed output. The high speed outputs are capable of ...
Description	Gigabit Ethernet Transceiver Chip 千兆以太网收发器芯片 Software
File Size	314.09K / 15 Page	View it Online	Download Datasheet

				AGERE[Agere Systems] LUCENT
Part No.	LG1600FXH3111 LG1600FXH1200 LG1600FXH1244 LG1600FXH1298 LG1600FXH2380 LG1600FXH5332 LG1600FXH0 LG1600FXH1555 LG1600FXH0622 LG1600FXH2666 TF1004A LG1600FXH LG1600FXH0500 LG1600FXH0553 LG1600FXH2433 LG1600FXH2488 LG1600FXH2949 LG1600FXH3840 LG1600FXH4977 LG1600FXHXXXX
OCR Text	...ity of the data signal. The PLL locks onto the frequency and phase of this pulse train and freewheels during times when transitions are absent. The LG1600FXH features dual phase detectors; one driven by an in-phase clock which is also drivi...
Description	LG1600FXH Clock and Data Regenerator
File Size	424.70K / 20 Page	View it Online	Download Datasheet

				INTEL[Intel Corporation]
Part No.	TE28F016B3B120 TE28F016B3B150 TE28F016B3T120 TE28F016B3T150 GT28F008B3B120 GT28F008B3B150 GT28F008B3T120 GT28F008B3T150 GT28F016B3B120 GT28F016B3B150 GT28F016B3T120 GT28F016B3T150 TE28F008B3B120 TE28F008B3B150 TE28F008B3T120 TE28F008B3T150 28F008B3
OCR Text	...Kbyte main blocks (16 Mbit) WP# locks/unlocks parameter blocks All other blocks protected using V PP switch Extended: -40C to +85C 10,000 cycles 40-Lead TSOP, 48-Ball BGA* CSP Section 2.2 Figures 4 and 5 Section 3.3 Table 8 Table 9, Table 1...
Description	SMART 3 ADVANCED BOOT BLOCK BYTE-WIDE
File Size	378.37K / 49 Page	View it Online	Download Datasheet

				SANYO[Sanyo Semicon Device]
Part No.	LC74723M LC74723
OCR Text	...MMAND1) is written, the LC74723 locks into the display character data write mode, and another first byte cannot be written. When a high level is input to the CS pin, the LC74723 is set to COMMAND0 (display memory write address setting mode)...
Description	On-Screen Display Controller
File Size	142.11K / 12 Page	View it Online	Download Datasheet

				MCNIX[Macronix International]
Part No.	MX29F1610 MX29F1610A MX29F1610A-10 MX29F1610A-12 MX29F1610A-90 29F1610 29F1610A 29F1610A-10 29F1610A-12 29F1610A-90
OCR Text	...ates normal operation. PWD also locks out erase or program operation when active low providing data protection during power transitions. OUTPUT ENABLES: Gates the device's data through the output buffers during a read cycle OE is active low...
Description	16M-BIT [2M x8/1M x16] CMOS SINGLE VOLTAGE FLASH EEPROM
File Size	667.29K / 39 Page	View it Online	Download Datasheet

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