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  double-configuration Datasheet PDF File

For double-configuration Found Datasheets File :: 10382    Search Time::2.859ms    
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    MTV412M MTV412MF128 MTV412MS128 MTV412MV128

MYSON TECHNOLOGY
ETC[ETC]
Part No. MTV412M MTV412MF128 MTV412MS128 MTV412MV128
OCR Text ... 12MHz operating frequency with double CPU clock option 0.35um process; 3.3V/5V power supply; 5V I/O tolerant 1024-byte RAM; 128K-byte progr...CONFIGURATION MTV412M (Rev 0.9) A "CMOS output pin" means it can sink and drive at least 4mA c...
Description 8051 Embedded Monitor Controller 128K Flash Type with ISP

File Size 251.00K  /  26 Page

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    NE57811 NE57811S

NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
Part No. NE57811 NE57811S
OCR Text ...vide power for termination of a Double Data Rate (DDR) SDRAM memory bus. It significantly reduces parts count, board space, and overall syst...CONFIGURATION PIN DESCRIPTION PIN 1 2 3 4 5 SYMBOL VTT VDD VSS SHTDWN RefOut DESCRIPTION Regulat...
Description Advanced DDR memory termination power with shutdown 先进的DDR存储器终端电源与关机

File Size 131.81K  /  13 Page

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    TDA8050A TDA8050A_N_1

PHILIPS[Philips Semiconductors]
Part No. TDA8050A TDA8050A_N_1
OCR Text ...d Q signals. It includes: * Two double balanced mixers * A balanced voltage controlled oscillator (VCO) with 0 to 90 degrees signal generati...configuration. OUTEN 1 BUF_OUT 2 BUF_OUTC 3 AGND2 4 I_IN 5 I_INC 6 Q_IN 7 Q_INC 8 32 SW_CAP 31...
Description QPSK transmitter
From old datasheet system

File Size 125.26K  /  28 Page

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    TDA8050 TDA8050T TDA8050_N_4

PHILIPS[Philips Semiconductors]
Part No. TDA8050 TDA8050T TDA8050_N_4
OCR Text ...d Q signals. It includes: * Two double-balanced mixers * Symmetrical Voltage Controlled Oscillator (VCO) with 0 to 90 degree signal generati...configuration. AGND1 9 TKAMOD 10 TKBMOD 11 CP_MOD 12 DVCC 13 CLK 14 DATA 15 EN 16 FCE182 TDA805...
Description TDA8046H
QPSK transmitter
From old datasheet system

File Size 127.06K  /  24 Page

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    UPD16347

NEC[NEC]
Part No. UPD16347
OCR Text ...SDS pin between single edge and double edge * Data control with transfer clock (external) and latch * High-speed data transfer: fCLK = 60 MH...CONFIGURATION (IC pad surface) PD16347N-xxx: TCP (TAB package) O192 VSS2 VDD2 VSS2 A6 A5 A4 A3 A...
Description 192-BIT AC-PDP DRIVER

File Size 158.04K  /  26 Page

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    UPD16633B UPD16633BN

NEC[NEC]
Part No. UPD16633B UPD16633BN
OCR Text ...power supply level inversion in double-sided mounting. Because the current flowing through ladder resistors r0 to r62 is small, its use for double-sided mounting impairs the IC's stable operation when the level of the -corrected power suppl...
Description 312 OUTPUT TFT-LCD SORCE DRIVER COMPATIBLE WITH 64 GRAY SCALES

File Size 105.83K  /  20 Page

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    UPD16634A UPD16634AN

NEC[NEC]
Part No. UPD16634A UPD16634AN
OCR Text ...power supply level inversion in double-sided mounting. 5 VDD2 V0 16 V1 V2 V3 16 16 Figure 5-1. Relationship between Input Data and Output Voltage Split interval 15 V4 VCOM V5 15 V6 16 V7 16 V8 16 V9 VSS2 00 08 10 18 20 28 30 38 3F...
Description 300-OUTPUT TFT-LCD SOURCE DRIVER COMPATIBLE WITH 64 GRAY SCALE

File Size 113.27K  /  20 Page

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For double-configuration Found Datasheets File :: 10382    Search Time::2.859ms    
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