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  backend Datasheet PDF File

For backend Found Datasheets File :: 154    Search Time::1.282ms    
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    COREPCI-AN COREPCI-AR COREPCI-EV COREPCI-SN COREPCI-SR COREPCI-UR COREPCI-XX

Actel Corporation
Part No. COREPCI-AN COREPCI-AR COREPCI-EV COREPCI-SN COREPCI-SR COREPCI-UR COREPCI-XX
OCR Text ...2.3 Specification - - - * backend Support for Synchronous DRAM, SRAM, and I/O Subsystems Version Key Features * * * * * Two User-Configurable Base Address Registers for Target Functions Interrupt Capability Built-in DMA Controller...
Description CorePCI v5.41

File Size 307.19K  /  42 Page

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    IMSA110 IMSA110-G20S 1126

ST Microelectronics
STMICROELECTRONICS[STMicroelectronics]
Part No. IMSA110 IMSA110-G20S 1126
OCR Text ...t Current coefficient registers backend look up table 256 x 8-bit data transformation look up RAM USR LSR Asynchronous Functions Configuration and control registers PCR0 PCR1 PCR2 SCR ACR BCR MMB OUB TCR 9 ADDRESS Control logic 7-stag...
Description IMAGE AND SIGNAL PROCESSING SUB-SYSTEM
IMAGE AND SIGNAL PROCESSING SUB.SYSTEM
From old datasheet system

File Size 352.55K  /  26 Page

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    AN156

Cirrus Logic
Part No. AN156
OCR Text ...End Expose To/From DSP or backend Power Down CXD1267AN V-Drive + CCD Bias V[4:1] Figure 1. Master Mode P.O. Box 17847, Austin, Texas 78760 (512) 445 7222 FAX: (512) 445 7581 http://www.cirrus.com Copyright (c) Cir...
Description Using the CS7620/22 with CCDs
From old datasheet system

File Size 86.06K  /  8 Page

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    TDA7528

STMicroelectronics
Part No. TDA7528
OCR Text ...ated in the appropriate STA3005 backend IC. The combination of two independently-operating frontends with the STA3005 backend makes DDA (Digital Directional Antenna) operation possible or the simultaneous reception of two freelyselectable f...
Description AM/FM car radio Front-End receiver for IF sampling tuners

File Size 72.83K  /  5 Page

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    quicklogic
Part No. QL5432 QL5432_DS
OCR Text ...d target abort requested by the backend. Any number of 32-bit BARs may be configured as memory or I/O space. All required and optional PCI v2.2 Configuration Space registers can be implemented within the programmable region of the device. A...
Description 33 MHz/32-Bit PCI Master/Target with Embedded Programmable Logic and Dual Port SRAM
From old datasheet system

File Size 716.33K  /  27 Page

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    quicklogic
Part No. QL5332
OCR Text ...d target abort requested by the backend. Any number of 32-bit BARs may be configured as memory or I/O space. All required and optional PCI v2.2 Configuration Space registers can be implemented within the programmable region of the device. A...
Description 33 MHz/32-Bit PCI Master/Target with Embedded Programmable Logic and Dual Port SRAM

File Size 701.80K  /  25 Page

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    quicklogic
Part No. QL5130
OCR Text ...s transfer rates * Programmable backend interface to optional local processor * Independent PCI bus (33 MHz) and local bus (up to 160 MHz) clocks * Fully customizable PCI configuration space * Configurable FIFOs with depths up to 128 * Refe...
Description 33 MHz/32-Bit PCI Target with Embedded Programmable Logic and Dual Port SRAM

File Size 704.61K  /  24 Page

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    VDP313XY VDP3134Y VDP3133Y VDP3130Y VDP3131Y VDP3132Y

MICRONAS[Micronas]
ETC
Part No. VDP313XY VDP3134Y VDP3133Y VDP3130Y VDP3131Y VDP3132Y
OCR Text ...ix, CLUT, Scan Veloc. Analog backend 3x10 bit DAC, Tube Control, RGB Switch 20.25 MHz Clock Gen. DCO I2C Sync and Deflection Measurement ADC I2C H/V/EW Sense Fig. 1-1: Block diagram of the VDP 313xY Micronas...
Description Video Processor Family

File Size 1,252.01K  /  76 Page

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    VDP3130Y VDP3131Y VDP3133Y VDP3132Y

micronas
Part No. VDP3130Y VDP3131Y VDP3133Y VDP3132Y
OCR Text ...ix, CLUT, Scan Veloc. Analog backend 3x10 bit DAC, Tube Control, RGB Switch 20.25 MHz Clock Gen. DCO I2C Sync and Deflection Measurement ADC I2C H/V/EW Sense Fig. 1-1: Block diagram of the VDP 313xY Micronas...
Description Video, Display, and Deflection Processors

File Size 1,206.27K  /  76 Page

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For backend Found Datasheets File :: 154    Search Time::1.282ms    
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