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INTEGRATED DEVICE TECHNOLOGY INC
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Part No. |
477R-05I
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OCR Text |
...output 54.054 mhz clock output. weak internal pull-down when tri-state. 12, 13, 17 nc - no connect. do not connect anything to these pins. 14 74.175m output 74.175 mhz clock output. weak internal pull-down when tri-state. 15, 16 27m output ... |
Description |
74.175 MHz, VIDEO CLOCK GENERATOR, PDSO28
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File Size |
141.12K /
8 Page |
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CYPRESS[Cypress Semiconductor] Cypress Semiconductor Corp. Cypress Semiconductor, Corp.
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Part No. |
CY2308 CY2308SC-1 CY2308SC-1H CY2308SC-2 CY2308SC-3 CY2308SC-4 CY2308SC-5H CY2308SI-1 CY2308SI-1H CY2308SI-2 CY2308SI-3 CY2308SI-4 CY2308SI-5H CY2308SXC-1 CY2308SXC-1H CY2308SXC-2 CY2308SXC-3 CY2308SXC-4 CY2308SXC-5H CY2308SXI-1 CY2308SXI-1H CY2308SXI-2 CY2308SXI-3 CY2308SXI-4 CY2308SXI-5H CY2308ZC-1H CY2308ZC-5H CY2308ZI-1H CY2308ZI-5H CY2308ZXC-1H CY2308ZXC-5H CY2308ZXI-1H CY2308ZXI-5H CYPRESSSEMICONDUCTORCORP-CY2308ZC-5H
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OCR Text |
...rence Reference /2
Notes: 1. weak pull-down. 2. weak pull-down on all outputs. 3. weak pull-ups on these inputs. 4. Outputs inverted on 2308-2 and 2308-3 in bypass mode, S2 = 1 and S1 = 0. 5. Output phase is indeterminant (0 or 180 from ... |
Description |
3.3V Zero Delay Buffer 3.3V Zero Delay Buffer 2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 AC 5C 2#16 1#12 2#4 PIN PLUG 2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
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File Size |
200.25K /
14 Page |
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it Online |
Download Datasheet
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Price and Availability
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